forked from github/verilator
35 lines
860 B
Perl
Executable File
35 lines
860 B
Perl
Executable File
#!/usr/bin/perl
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if (!$::Driver) { use FindBin; exec("$FindBin::Bin/bootstrap.pl", @ARGV, $0); die; }
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# DESCRIPTION: Verilator: Verilog Test driver/expect definition
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#
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# Copyright 2003 by Wilson Snyder. This program is free software; you can
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# redistribute it and/or modify it under the terms of either the GNU
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# Lesser General Public License Version 3 or the Perl Artistic License
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# Version 2.0.
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scenarios(simulator => 1);
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compile(
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verilator_flags2 => ['-trace'],
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);
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execute(
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expect => quotemeta(
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'ingen: {mod}.genblk1 top.t.genblk1
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d3a: {mod}.d3nameda top.t.d3nameda
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b2: {mod} top.t
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b3n: {mod}.b3named: top.t.b3named
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b3: {mod} top.t
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b4: {mod} top.t
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t1 {mod}.tsk top.t
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t2 {mod}.tsk top.t
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*-* All Finished *-*'),
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);
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if ($Self->{vlt_all}) {
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vcd_identical("$Self->{obj_dir}/simx.vcd",
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"t/$Self->{name}.out");
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}
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ok(1);
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1;
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