forked from github/verilator
27 lines
533 B
Systemverilog
27 lines
533 B
Systemverilog
// DESCRIPTION: Verilator: Test of select from constant
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//
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// This file ONLY is placed under the Creative Commons Public Domain, for
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// any use, without warranty, 2020 by Wilson Snyder.
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// SPDX-License-Identifier: CC0-1.0
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module t (/*AUTOARG*/
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// Outputs
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o,
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// Inputs
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clk
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);
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input clk;
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output int o;
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localparam SIZE = 65536;
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int array [SIZE];
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always @ (posedge clk) begin
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for (int i=0; i<SIZE; i++) begin
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array[i] <= 0; // BLKLOOPINIT
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end
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o <= array[1];
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end
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endmodule
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