forked from github/verilator
16 lines
874 B
Plaintext
16 lines
874 B
Plaintext
%Warning-STMTDLY: t/t_net_delay.v:13:14: Ignoring delay on this statement due to --no-timing
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: ... In instance t
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13 | wire[3:0] #4 val1 = cyc;
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| ^
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... For warning description see https://verilator.org/warn/STMTDLY?v=latest
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... Use "/* verilator lint_off STMTDLY */" and lint_on around source to disable this message.
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%Warning-STMTDLY: t/t_net_delay.v:14:14: Ignoring delay on this statement due to --no-timing
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: ... In instance t
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14 | wire[3:0] #4 val2;
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| ^
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%Warning-ASSIGNDLY: t/t_net_delay.v:17:11: Ignoring timing control on this assignment/primitive due to --no-timing
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: ... In instance t
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17 | assign #4 val2 = cyc;
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| ^
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%Error: Exiting due to
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