forked from github/verilator
81 lines
1.8 KiB
Systemverilog
81 lines
1.8 KiB
Systemverilog
// DESCRIPTION: Verilator: Functionally demonstrate an array of interfaces
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//
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// This file ONLY is placed into the Public Domain, for any use,
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// without warranty, 2015 by Todd Strader.
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// SPDX-License-Identifier: CC0-1.0
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interface foo_intf;
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logic a;
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modport source (
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output a
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);
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modport sink (
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input a
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);
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endinterface
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function integer identity (input integer val);
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return val;
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endfunction
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module t (/*AUTOARG*/
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// Inputs
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clk
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);
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input clk;
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localparam N = 5;
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logic [N-1:0] a_in;
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logic [N-1:0] a_out;
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logic [N-1:0] ack_out;
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foo_intf foos [N-1:0] ();
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// Deferred link dotting with genvars
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generate
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genvar i;
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for (i = 0; i < N-4; i++) begin : someLoop
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assign ack_out[i] = a_in[i];
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assign foos[i].a = a_in[i];
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assign a_out[i] = foos[i].a;
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end
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endgenerate
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// Defferred link dotting with localparam
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localparam THE_LP = N-3;
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assign ack_out[THE_LP] = a_in[THE_LP];
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assign foos[THE_LP].a = a_in[THE_LP];
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assign a_out[THE_LP] = foos[THE_LP].a;
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// Defferred link dotting with arithmetic expression
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assign ack_out[N-2] = a_in[N-2];
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assign foos[N-2].a = a_in[N-2];
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assign a_out[N-2] = foos[N-2].a;
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// Defferred link dotting with funcrefs
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assign ack_out[identity(N-1)] = a_in[identity(N-1)];
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assign foos[identity(N-1)].a = a_in[identity(N-1)];
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assign a_out[identity(N-1)] = foos[identity(N-1)].a;
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initial a_in = '0;
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always @(posedge clk) begin
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a_in <= a_in + { {N-1 {1'b0}}, 1'b1 };
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if (ack_out != a_out) begin
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$display("%%Error: Interface and non-interface paths do not match: 0b%b 0b%b",
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ack_out, a_out);
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$stop;
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end
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if (& a_in) begin
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$write("*-* All Finished *-*\n");
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$finish;
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end
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end
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endmodule
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