forked from github/verilator
120 lines
3.3 KiB
C++
120 lines
3.3 KiB
C++
// DESCRIPTION: Verilator: Verilog Test module
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//
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// This file ONLY is placed under the Creative Commons Public Domain, for
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// any use, without warranty, 2021 by Geza Lore.
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// SPDX-License-Identifier: CC0-1.0
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#include "verilatedos.h"
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#include "verilated.h"
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#include <memory>
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#if VM_TRACE
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#include "verilated_vcd_c.h"
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#endif
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#include VM_PREFIX_INCLUDE
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#include VM_PREFIX_ROOT_INCLUDE
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int main(int argc, char** argv) {
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const std::unique_ptr<VerilatedContext> contextp{new VerilatedContext};
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contextp->debug(0);
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contextp->commandArgs(argc, argv);
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srand48(5);
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const std::unique_ptr<VM_PREFIX> topp{new VM_PREFIX{"top"}};
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topp->clk = false;
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topp->rst = true;
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topp->eval();
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#if VM_TRACE
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contextp->traceEverOn(true);
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std::unique_ptr<VerilatedVcdC> tfp{new VerilatedVcdC};
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topp->trace(tfp.get(), 99);
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tfp->open(VL_STRINGIFY(TEST_OBJ_DIR) "/simx.vcd");
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tfp->dump(contextp->time());
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#endif
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contextp->timeInc(5);
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topp->clk = true;
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topp->eval();
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topp->rst = false;
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topp->eval();
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#if VM_TRACE
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tfp->dump(contextp->time());
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#endif
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contextp->timeInc(5);
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while (contextp->time() < 1000 && !contextp->gotFinish()) {
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topp->clk = !topp->clk;
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topp->eval();
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if (topp->clk) {
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bool needsSecondEval = false;
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if (topp->cyc == 13) {
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topp->rootp->t__DOT__var_1__VforceEn = 1;
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topp->rootp->t__DOT__var_1__VforceVal = 1;
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needsSecondEval = true;
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}
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if (topp->cyc == 15) {
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topp->rootp->t__DOT__var_1__VforceVal = 0;
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needsSecondEval = true;
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}
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if (topp->cyc == 18) {
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topp->rootp->t__DOT__var_1__VforceEn = 0;
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needsSecondEval = true;
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}
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if (topp->cyc == 14) {
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topp->rootp->t__DOT__var_8__VforceEn = 0xff;
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topp->rootp->t__DOT__var_8__VforceVal = 0xf5;
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needsSecondEval = true;
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}
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if (topp->cyc == 16) {
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topp->rootp->t__DOT__var_8__VforceVal = 0x5f;
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needsSecondEval = true;
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}
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if (topp->cyc == 19) {
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topp->rootp->t__DOT__var_8__VforceEn = 0;
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needsSecondEval = true;
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}
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if (topp->cyc == 20) {
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topp->rootp->t__DOT__var_1__VforceEn = 1;
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topp->rootp->t__DOT__var_8__VforceEn = 0xff;
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topp->rootp->t__DOT__var_1__VforceVal = 1;
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topp->rootp->t__DOT__var_8__VforceVal = 0x5a;
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needsSecondEval = true;
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}
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if (topp->cyc == 22) {
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topp->rootp->t__DOT__var_1__VforceVal = 0;
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topp->rootp->t__DOT__var_8__VforceVal = 0xa5;
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needsSecondEval = true;
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}
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if (topp->cyc == 24) {
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topp->rootp->t__DOT__var_1__VforceEn = 0;
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topp->rootp->t__DOT__var_8__VforceEn = 0;
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needsSecondEval = true;
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}
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if (needsSecondEval) topp->eval();
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}
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#if VM_TRACE
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tfp->dump(contextp->time());
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#endif
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contextp->timeInc(5);
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}
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if (!contextp->gotFinish()) {
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vl_fatal(__FILE__, __LINE__, "main", "%Error: Timeout; never got a $finish");
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}
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topp->final();
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#if VM_TRACE
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tfp->close();
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#endif
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return 0;
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}
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