forked from github/verilator
0102efd4ea
* Add tests for unpacked array in DPI-C * Add more generic parameter generator to AstNodes * Supports multi dimensional array in DPI ( DPI argmuments <=> Verilator internal type conversion) consider typedef in V3Task fix export test fix inout for scalar support export func of time * V3Premit does not show an error for wide words nor ArraySel * Unnecessary pack func for unapcked array does not appear anymore * Support unpacked array in runtime header - Add an overload for lvalue VL_CVT_PACK_STR_NN - Allow conversion from void * * touch up tests for codacy advices * resolve free functions. no functional change intended.
32 lines
994 B
Systemverilog
32 lines
994 B
Systemverilog
// DESCRIPTION: Verilator: Verilog Test module
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//
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// Copyright 2020 by Yutetsu TAKATSUKASA. This program is free software; you can
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// redistribute it and/or modify it under the terms of either the GNU
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// Lesser General Public License Version 3 or the Perl Artistic License
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// Version 2.0.
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// SPDX-License-Identifier: LGPL-3.0-only OR Artistic-2.0
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module t;
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logic [2:0] sig0[3];
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logic [2:0] sig1[3][2];
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bit [2:0] sig2[3][3];
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import "DPI-C" function void import_func0(input logic [3:0] in [0:2]);
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import "DPI-C" function void import_func1(input logic [2:0] in [0:2]);
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import "DPI-C" function void import_func2(input logic [2:0] in [0:2][0:2]);
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initial begin
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// packed width differs
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import_func0(sig0);
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// dimension differs
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import_func1(sig1);
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// unpacked extent differs
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import_func2(sig1);
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// bit v.s. logic mismatch
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import_func2(sig2);
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// packed var for unpacked port
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import_func0(sig0[1]);
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end
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endmodule
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