forked from github/verilator
17 lines
751 B
Plaintext
17 lines
751 B
Plaintext
%Error: t/t_clocking_bad2.v:15:32: 1step not allowed as output skew
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15 | default input #1 output #1step;
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| ^
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%Error: t/t_clocking_bad2.v:16:23: Multiple default input skews not allowed
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16 | default input #2 output #2;
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| ^
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%Error: t/t_clocking_bad2.v:16:33: Multiple default output skews not allowed
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16 | default input #2 output #2;
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| ^
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%Error: t/t_clocking_bad2.v:17:15: 1step not allowed as output skew
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17 | output #1step out;
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| ^
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%Error: t/t_clocking_bad2.v:18:8: Multiple clockvars with the same name not allowed
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18 | output out;
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| ^~~~~~
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%Error: Exiting due to
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