forked from github/verilator
6 lines
273 B
Plaintext
6 lines
273 B
Plaintext
%Error: t/t_bitsel_const_bad.v:21:16: Illegal bit or array select; type does not have a bit range, or bad dimension: data type is 'logic'
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: ... In instance t
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21 | assign a = b[0];
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| ^
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%Error: Exiting due to
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