verilator/test_regress
Yutetsu TAKATSUKASA e48a859b86
Add timescale directive for hier_block if the original design has it (#2554)
* add timescale directive to a test to reproduce #2544

* add timescale directive to hierarchy blocks
2020-09-17 06:09:29 +09:00
..
t Add timescale directive for hier_block if the original design has it (#2554) 2020-09-17 06:09:29 +09:00
.gdbinit
.gitignore
CMakeLists.txt
driver.pl
input.vc
input.xsim.vc
Makefile
Makefile_obj
vgen.pl