forked from github/verilator
154 lines
3.4 KiB
Systemverilog
154 lines
3.4 KiB
Systemverilog
// DESCRIPTION: Verilator: Dotted reference that uses another dotted reference
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// as the select expression
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//
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// This file ONLY is placed into the Public Domain, for any use,
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// without warranty, 2020 by Wilson Snyder.
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// SPDX-License-Identifier: CC0-1.0
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module t (/*AUTOARG*/
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// Inputs
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clk, in
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);
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input clk;
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input in;
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// verilator lint_off UNPACKED
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typedef enum {
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ZERO,
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ONE = 1
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} e_t;
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typedef struct packed {
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e_t a;
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} ps_t;
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typedef struct {
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logic signed [2:0] a;
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} us_t;
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const ps_t ps[3];
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us_t us;
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int array[3];
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initial array = '{1,2,3};
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reg [15:0] pubflat /*verilator public_flat_rw @(posedge clk) */;
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reg [15:0] pubflat_r;
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wire [15:0] pubflat_w = pubflat;
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int fd;
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int i;
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task t;
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$display("stmt");
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endtask
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function int f(input int v);
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$display("stmt");
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return v == 0 ? 99 : ~v + 1;
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endfunction
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sub sub();
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initial begin
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int other;
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begin //unnamed
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for (int i = 0; i < 3; ++i) begin
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other = f(i);
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$display("stmt %d %d", i, other);
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t();
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end
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end
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begin : named
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$display("stmt");
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end : named
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end
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final begin
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$display("stmt");
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end
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always @ (in) begin
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$display("stmt");
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end
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always @ (posedge clk) begin
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$display("posedge clk");
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pubflat_r <= pubflat_w;
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end
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always @ (negedge clk) begin
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$display("negedge clk, pfr = %x", pubflat_r);
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end
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int cyc;
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int fo;
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int sum;
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string str;
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always_ff @ (posedge clk) begin
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cyc <= cyc + 1;
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fo = cyc;
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sub.inc(fo, sum);
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sum = sub.f(sum);
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$display("[%0t] sum = %d", $time, sum);
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$c(";");
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$display("%d", $c("0"));
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fd = $fopen("/dev/null");
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$fclose(fd);
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fd = $fopen("/dev/null", "r");
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$fgetc(fd); // stmt
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$fflush(fd);
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$fscanf(fd, "%d", sum);
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$fdisplay("i = ", sum);
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$fwrite(fd, "hello");
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$readmemh(fd, array);
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$readmemh(fd, array, 0);
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$readmemh(fd, array, 0, 0);
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sum = 0;
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for (int i = 0; i < cyc; ++i) begin
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sum += i;
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if (sum > 10) break;
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else sum += 1;
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end
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if (cyc == 99) $finish;
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if (cyc == 100) $stop;
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case (in) // synopsys full_case parallel_case
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1: $display("1");
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default: $display("default");
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endcase
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priority case (in)
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1: $display("1");
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default: $display("default");
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endcase
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unique case (in)
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1: $display("1");
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default: $display("default");
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endcase
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unique0 case (in)
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1: $display("1");
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default: $display("default");
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endcase
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if (in) $display("1"); else $display("0");
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priority if (in) $display("1"); else $display("0");
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unique if (in) $display("1"); else $display("0");
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unique0 if (in) $display("1"); else $display("0");
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$display($past(cyc), $past(cyc, 1));
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str = $sformatf("cyc=%d", cyc);
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$display("str = %s", str);
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$display("[%t] [%t]", $time, $realtime);
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$sscanf("foo=5", "foo=%d", i);
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if (i != 5) $stop;
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end
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endmodule
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module sub();
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task inc(input int i, output int o);
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o = {1'b0, i[31:1]} + 32'd1;
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endtask
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function int f(input int v);
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if (v == 0) return 33;
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return {31'd0, v[2]} + 32'd1;
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endfunction
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endmodule
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