forked from github/verilator
d6ac351dcb
This switch exposes VARs, PORTs and WIREs to C++ code. It must be use with care as it has a significant performance impact and may result in mis-simulation of generated clocks. Anyhow, it is prefered over --public and useful for VPI. Signed-off-by: Lukasz Dalek <ldalek@antmicro.com> Signed-off-by: Stefan Wallentowitz <stefan@wallentowitz.de> Signed-off-by: Wilson Snyder <wsnyder@wsnyder.org> |
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CONTRIBUTORS | ||
doxygen-mainpage | ||
doxygen.config | ||
Makefile.in | ||
TODO | ||
verilator_logo.png |