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Mario1159
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verilator
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d46074e0ad
verilator
/
test_regress
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Wilson Snyder
d46074e0ad
CDC: --cdc now implies early exit, to allow eventual set_logic_0/1 on sigs
2010-01-16 20:14:52 -05:00
..
t
CDC: --cdc now implies early exit, to allow eventual set_logic_0/1 on sigs
2010-01-16 20:14:52 -05:00
.gitignore
driver.pl
Define VERILATOR in addition to verilator
2010-01-14 19:24:48 -05:00
input.vc
Makefile
Use vlt as abbreviation to avoid confusion with other simulator
2010-01-06 08:54:56 -05:00
Makefile_obj
Copyright year update
2010-01-05 21:15:06 -05:00