verilator/test_regress/t/t_interface_param_loop_bad.pl
Driss Hafdi dcbdac1b81 Tests: Unsupported test for bug1626.
Signed-off-by: Wilson Snyder <wsnyder@wsnyder.org>
2019-12-07 13:46:29 -05:00

21 lines
586 B
Perl
Executable File

#!/usr/bin/perl
if (!$::Driver) { use FindBin; exec("$FindBin::Bin/bootstrap.pl", @ARGV, $0); die; }
# DESCRIPTION: Verilator: Verilog Test driver/expect definition
#
# Copyright 2019 by Wilson Snyder. This program is free software; you can
# redistribute it and/or modify it under the terms of either the GNU
# Lesser General Public License Version 3 or the Perl Artistic License
# Version 2.0.
$Self->{vlt_all} and unsupported("Verilator unsupported, bug1626");
scenarios(simulator => 1);
compile(
fails => 1,
expect_filename => $Self->{golden_filename},
);
ok(1);
1;