forked from github/verilator
4a122fd0f2
* Add detailed location to XML output * Fixing build failures * less cryptic regulary expressions * correcting typo in test * Adding file letter to the location attribute, and cleaning up the regular expression in the tests. * Add remaining test expected output files for XML changes * spacing fix, adding documentation on changes
33 lines
1.7 KiB
Perl
Executable File
33 lines
1.7 KiB
Perl
Executable File
#!/usr/bin/perl
|
|
if (!$::Driver) { use FindBin; exec("$FindBin::Bin/bootstrap.pl", @ARGV, $0); die; }
|
|
# DESCRIPTION: Verilator: Verilog Test driver/expect definition
|
|
#
|
|
# Copyright 2003 by Wilson Snyder. This program is free software; you can
|
|
# redistribute it and/or modify it under the terms of either the GNU
|
|
# Lesser General Public License Version 3 or the Perl Artistic License
|
|
# Version 2.0.
|
|
|
|
scenarios(simulator => 1);
|
|
|
|
top_filename("t/t_unopt_combo.v");
|
|
my $out_filename = "$Self->{obj_dir}/V$Self->{name}.xml";
|
|
|
|
compile(
|
|
verilator_flags2 => ["+define+ISOLATE --stats"],
|
|
);
|
|
|
|
if ($Self->{vlt_all}) {
|
|
file_grep($Self->{stats}, qr/Optimizations, isolate_assignments blocks\s+5/i);
|
|
file_grep("$out_filename", qr/\<var fl="d22" loc=".*?" name="t.b" dtype_id="4" vartype="logic" origName="b" isolate_assignments="true"\/\>/i);
|
|
file_grep("$out_filename", qr/\<var fl="d98" loc=".*?" name="__Vfunc_t.file.get_31_16__0__Vfuncout" dtype_id="5" vartype="logic" origName="__Vfunc_t__DOT__file__DOT__get_31_16__0__Vfuncout" isolate_assignments="true"\/\>/i);
|
|
file_grep("$out_filename", qr/\<var fl="d99" loc=".*?" name="__Vfunc_t.file.get_31_16__0__t_crc" dtype_id="4" vartype="logic" origName="__Vfunc_t__DOT__file__DOT__get_31_16__0__t_crc" isolate_assignments="true"\/\>/i);
|
|
file_grep("$out_filename", qr/\<var fl="d111" loc=".*?" name="__Vtask_t.file.set_b_d__1__t_crc" dtype_id="4" vartype="logic" origName="__Vtask_t__DOT__file__DOT__set_b_d__1__t_crc" isolate_assignments="true"\/\>/i);
|
|
file_grep("$out_filename", qr/\<var fl="d112" loc=".*?" name="__Vtask_t.file.set_b_d__1__t_c" dtype_id="4" vartype="logic" origName="__Vtask_t__DOT__file__DOT__set_b_d__1__t_c" isolate_assignments="true"\/\>/i);
|
|
}
|
|
|
|
execute(
|
|
);
|
|
|
|
ok(1);
|
|
1;
|