verilator/test_regress/t/t_lint_rsvd_bad.out

11 lines
426 B
Plaintext

%Error: t/t_lint_rsvd_bad.v:7:1: Unsupported: Verilog 2001-config reserved word not implemented: 'config'
7 | config cfgBad;
| ^~~~~~
%Error: t/t_lint_rsvd_bad.v:7:8: syntax error, unexpected IDENTIFIER
7 | config cfgBad;
| ^~~~~~
%Error: t/t_lint_rsvd_bad.v:8:1: Unsupported: Verilog 2001-config reserved word not implemented: 'endconfig'
8 | endconfig
| ^~~~~~~~~
%Error: Exiting due to