forked from github/verilator
16 lines
871 B
Plaintext
16 lines
871 B
Plaintext
%Warning-ASSIGNDLY: t/t_delay.v:20:13: Unsupported: Ignoring delay on this assignment/primitive.
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20 | assign #(1.2000000000000000) dly1 = dly0 + 32'h1;
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| ^~~~~~~~~~~~~~~~~~
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... Use "/* verilator lint_off ASSIGNDLY */" and lint_on around source to disable this message.
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%Warning-ASSIGNDLY: t/t_delay.v:25:19: Unsupported: Ignoring delay on this assignment/primitive.
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25 | dly0 <= #0 32'h11;
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| ^
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%Warning-ASSIGNDLY: t/t_delay.v:28:19: Unsupported: Ignoring delay on this assignment/primitive.
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28 | dly0 <= #0.12 dly0 + 32'h12;
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| ^~~~
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%Warning-STMTDLY: t/t_delay.v:34:11: Unsupported: Ignoring delay on this delayed statement.
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: ... In instance t
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34 | #100 $finish;
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| ^~~
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%Error: Exiting due to
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