forked from github/verilator
41 lines
1.2 KiB
Perl
Executable File
41 lines
1.2 KiB
Perl
Executable File
#!/usr/bin/env perl
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# Makes the test run with tracing enabled by default, can be overridden
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# with --notrace
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unshift(@ARGV, "--trace");
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if (!$::Driver) { use FindBin; exec("$FindBin::Bin/bootstrap.pl", @ARGV, $0); die; }
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# DESCRIPTION: Verilator: Verilog Test driver/expect definition
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#
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# Copyright 2019 by Todd Strader. This program is free software; you
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# can redistribute it and/or modify it under the terms of either the GNU
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# Lesser General Public License Version 3 or the Perl Artistic License
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# Version 2.0.
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# SPDX-License-Identifier: LGPL-3.0-only OR Artistic-2.0
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scenarios(
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vlt => 1,
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xsim => 1,
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);
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$Self->{sim_time} = $Self->{benchmark} * 100 if $Self->{benchmark};
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top_filename("t/t_lib_prot.v");
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# Tests the same code as t_lib_prot.pl but without --protect-lib
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compile(
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verilator_flags2 => ["t/t_lib_prot_secret.v"],
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xsim_flags2 => ["t/t_lib_prot_secret.v"],
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);
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execute(
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check_finished => 1,
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);
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if ($Self->{vlt} && $Self->{trace}) {
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# We can see the ports of the secret module
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file_grep("$Self->{obj_dir}/simx.vcd", qr/accum_in/);
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# and we can see what's inside (because we didn't use --protect-lib)
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file_grep("$Self->{obj_dir}/simx.vcd", qr/secret_/);
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}
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ok(1);
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1;
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