forked from github/verilator
13 lines
768 B
Plaintext
13 lines
768 B
Plaintext
%Warning-BLKSEQ: t/t_lint_blksync_bad.v:24:16: Blocking assignments (=) in sequential (flop or latch) block
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: ... Suggest delayed assignments (<=)
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24 | sync_blk = 1'b1;
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| ^
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... Use "/* verilator lint_off BLKSEQ */" and lint_on around source to disable this message.
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%Warning-COMBDLY: t/t_lint_blksync_bad.v:31:18: Delayed assignments (<=) in non-clocked (non flop or latch) block
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: ... Suggest blocking assignments (=)
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31 | combo_nblk <= 1'b1;
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| ^~
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*** See the manual before disabling this,
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else you may end up with different sim results.
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%Error: Exiting due to
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