forked from github/verilator
13 lines
312 B
Plaintext
13 lines
312 B
Plaintext
// DESCRIPTION: Verilator: Verilog Test module
|
|
//
|
|
// This file ONLY is placed into the Public Domain, for any use,
|
|
// without warranty, 2019 by Stefan Wallentowitz.
|
|
// SPDX-License-Identifier: CC0-1.0
|
|
|
|
`verilator_config
|
|
|
|
inline -module "global_mod"
|
|
inline -module "ma"
|
|
no_inline -module "mb"
|
|
inline -module "mc"
|