forked from github/verilator
84 lines
4.5 KiB
Systemverilog
84 lines
4.5 KiB
Systemverilog
// DESCRIPTION: Verilator: Verilog Test module
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//
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// This file ONLY is placed under the Creative Commons Public Domain, for
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// any use, without warranty, 2022 by Geza Lore.
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// SPDX-License-Identifier: CC0-1.0
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`ifdef verilator
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`define dontOptimize $c1("1")
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`else
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`define dontOptimize 1'b1
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`endif
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module t (/*AUTOARG*/
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// Inputs
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clk
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);
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input clk;
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int cyc = 0;
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int x = 0;
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always @(posedge clk) begin
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cyc <= cyc + 1;
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x = 32'hcafe1234;
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if (`dontOptimize) if (`dontOptimize) if (`dontOptimize) if (`dontOptimize)
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if (`dontOptimize) if (`dontOptimize) if (`dontOptimize) if (`dontOptimize)
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if (`dontOptimize) if (`dontOptimize) if (`dontOptimize) if (`dontOptimize)
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if (`dontOptimize) if (`dontOptimize) if (`dontOptimize) if (`dontOptimize)
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if (`dontOptimize) if (`dontOptimize) if (`dontOptimize) if (`dontOptimize)
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if (`dontOptimize) if (`dontOptimize) if (`dontOptimize) if (`dontOptimize)
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if (`dontOptimize) if (`dontOptimize) if (`dontOptimize) if (`dontOptimize)
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if (`dontOptimize) if (`dontOptimize) if (`dontOptimize) if (`dontOptimize)
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if (`dontOptimize) if (`dontOptimize) if (`dontOptimize) if (`dontOptimize)
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if (`dontOptimize) if (`dontOptimize) if (`dontOptimize) if (`dontOptimize)
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if (`dontOptimize) if (`dontOptimize) if (`dontOptimize) if (`dontOptimize)
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if (`dontOptimize) if (`dontOptimize) if (`dontOptimize) if (`dontOptimize)
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if (`dontOptimize) if (`dontOptimize) if (`dontOptimize) if (`dontOptimize)
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if (`dontOptimize) if (`dontOptimize) if (`dontOptimize) if (`dontOptimize)
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if (`dontOptimize) if (`dontOptimize) if (`dontOptimize) if (`dontOptimize)
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if (`dontOptimize) if (`dontOptimize) if (`dontOptimize) if (`dontOptimize)
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if (`dontOptimize) if (`dontOptimize) if (`dontOptimize) if (`dontOptimize)
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if (`dontOptimize) if (`dontOptimize) if (`dontOptimize) if (`dontOptimize)
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if (`dontOptimize) if (`dontOptimize) if (`dontOptimize) if (`dontOptimize)
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if (`dontOptimize) if (`dontOptimize) if (`dontOptimize) if (`dontOptimize)
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if (`dontOptimize) if (`dontOptimize) if (`dontOptimize) if (`dontOptimize)
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if (`dontOptimize) if (`dontOptimize) if (`dontOptimize) if (`dontOptimize)
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if (`dontOptimize) if (`dontOptimize) if (`dontOptimize) if (`dontOptimize)
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if (`dontOptimize) if (`dontOptimize) if (`dontOptimize) if (`dontOptimize)
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if (`dontOptimize) if (`dontOptimize) if (`dontOptimize) if (`dontOptimize)
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if (`dontOptimize) if (`dontOptimize) if (`dontOptimize) if (`dontOptimize)
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if (`dontOptimize) if (`dontOptimize) if (`dontOptimize) if (`dontOptimize)
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if (`dontOptimize) if (`dontOptimize) if (`dontOptimize) if (`dontOptimize)
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if (`dontOptimize) if (`dontOptimize) if (`dontOptimize) if (`dontOptimize)
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if (`dontOptimize) if (`dontOptimize) if (`dontOptimize) if (`dontOptimize)
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if (`dontOptimize) if (`dontOptimize) if (`dontOptimize) if (`dontOptimize)
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if (`dontOptimize) if (`dontOptimize) if (`dontOptimize) if (`dontOptimize)
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if (`dontOptimize) if (`dontOptimize) if (`dontOptimize) if (`dontOptimize)
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if (`dontOptimize) if (`dontOptimize) if (`dontOptimize) if (`dontOptimize)
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if (`dontOptimize) if (`dontOptimize) if (`dontOptimize) if (`dontOptimize)
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if (`dontOptimize) if (`dontOptimize) if (`dontOptimize) if (`dontOptimize)
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if (`dontOptimize) if (`dontOptimize) if (`dontOptimize) if (`dontOptimize)
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if (`dontOptimize) if (`dontOptimize) if (`dontOptimize) if (`dontOptimize)
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if (`dontOptimize) if (`dontOptimize) if (`dontOptimize) if (`dontOptimize)
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if (`dontOptimize) if (`dontOptimize) if (`dontOptimize) if (`dontOptimize)
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if (`dontOptimize) if (`dontOptimize) if (`dontOptimize) if (`dontOptimize)
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if (`dontOptimize) if (`dontOptimize) if (`dontOptimize) if (`dontOptimize)
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if (`dontOptimize) if (`dontOptimize) if (`dontOptimize) if (`dontOptimize)
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if (`dontOptimize) if (`dontOptimize) if (`dontOptimize) if (`dontOptimize)
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if (`dontOptimize) if (`dontOptimize) if (`dontOptimize) if (`dontOptimize)
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if (`dontOptimize) if (`dontOptimize) if (`dontOptimize) if (`dontOptimize)
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if (`dontOptimize) if (`dontOptimize) if (`dontOptimize) if (`dontOptimize)
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if (`dontOptimize) if (`dontOptimize) if (`dontOptimize) if (`dontOptimize)
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x = cyc;
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$write("[%0t] cyc=%0d x=%x\n", $time, cyc, x);
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if (x !== cyc) $stop;
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if (cyc == 99) begin
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$write("*-* All Finished *-*\n");
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$finish;
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end
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end
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endmodule
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