forked from github/verilator
ce10dbd11c
git-svn-id: file://localhost/svn/verilator/trunk/verilator@753 77ca24e4-aefa-0310-84f0-b9a241c72d87
28 lines
512 B
Verilog
28 lines
512 B
Verilog
// $Id$
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// DESCRIPTION: Verilator: Verilog Test module
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//
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// This file ONLY is placed into the Public Domain, for any use,
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// without warranty, 2005 by Wilson Snyder.
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module liblib_a (/*AUTOARG*/);
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liblib_b b ();
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endmodule
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module liblib_b (/*AUTOARG*/);
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initial begin
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$write("*-* All Finished *-*\n");
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$finish;
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end
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endmodule
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module liblib_c (/*AUTOARG*/);
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// Unused
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initial $stop;
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liblib_d d ();
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endmodule
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module liblib_d (/*AUTOARG*/);
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// Unused
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initial $stop;
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endmodule
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