forked from github/verilator
8 lines
337 B
Plaintext
8 lines
337 B
Plaintext
%Error: t/t_var_port2_bad.v:7:11: Input/output/inout declaration not found for port: 'portwithoin'
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7 | module t (portwithoin);
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| ^~~~~~~~~~~
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%Error: t/t_var_port2_bad.v:8:10: Input/output/inout does not appear in port list: 'portwithin'
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8 | input portwithin;
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| ^~~~~~~~~~
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%Error: Exiting due to
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