forked from github/verilator
39 lines
1.3 KiB
C++
39 lines
1.3 KiB
C++
// -*- mode: C++; c-file-style: "cc-mode" -*-
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//*************************************************************************
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// DESCRIPTION: Verilator: Emit Verilog code for module tree
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//
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// Code available from: https://verilator.org
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//
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//*************************************************************************
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//
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// Copyright 2003-2020 by Wilson Snyder. This program is free software; you
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// can redistribute it and/or modify it under the terms of either the GNU
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// Lesser General Public License Version 3 or the Perl Artistic License
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// Version 2.0.
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// SPDX-License-Identifier: LGPL-3.0-only OR Artistic-2.0
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//
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//*************************************************************************
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#ifndef _V3EMITV_H_
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#define _V3EMITV_H_ 1
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#include "config_build.h"
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#include "verilatedos.h"
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#include "V3Error.h"
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#include "V3Ast.h"
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//============================================================================
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class V3EmitV {
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public:
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static void emitv();
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static void verilogForTree(AstNode* nodep, std::ostream& os=std::cout);
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static void verilogPrefixedTree(AstNode* nodep, std::ostream& os,
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const string& prefix, int flWidth,
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AstSenTree* domainp, bool user3mark);
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static void emitvFiles();
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};
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#endif // Guard
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