verilator/test_regress
Yutetsu TAKATSUKASA 1c1b95161b
Load source file of the hier_block explicitly (#2559)
* Add a test to make sure that lib modules (loaded via -y option) can be a hier_block.

* Add HDL file of the hier_block to the source list if the module is loaded via -y option.

(Each hier_block is treated as a top module when processing the hier_block.)

* Use "\n" for delimiter as the other files
2020-09-19 08:13:49 +09:00
..
t Load source file of the hier_block explicitly (#2559) 2020-09-19 08:13:49 +09:00
.gdbinit
.gitignore
CMakeLists.txt
driver.pl
input.vc
input.xsim.vc
Makefile
Makefile_obj
vgen.pl