verilator/test_regress/t/t_inst_array_connect.pl
Julien Margetts f7a06cb54a Fix little endian cell ranges, bug1631.
Signed-off-by: Wilson Snyder <wsnyder@wsnyder.org>
2019-12-11 17:15:45 -05:00

21 lines
494 B
Perl
Executable File

#!/usr/bin/perl
if (!$::Driver) { use FindBin; exec("$FindBin::Bin/bootstrap.pl", @ARGV, $0); die; }
# DESCRIPTION: Verilator: Verilog Test driver/expect definition
#
# Copyright 2019 by Wilson Snyder. This program is free software; you can
# redistribute it and/or modify it under the terms of either the GNU
# Lesser General Public License Version 3 or the Perl Artistic License
# Version 2.0.
scenarios(simulator => 1);
compile(
);
execute(
check_finished => 1,
);
ok(1);
1;