forked from github/verilator
46 lines
1.3 KiB
Systemverilog
46 lines
1.3 KiB
Systemverilog
// DESCRIPTION: Verilator: Verilog Test module
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//
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// Copyright 2017 by Wilson Snyder. This program is free software; you can
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// redistribute it and/or modify it under the terms of either the GNU
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// Lesser General Public License Version 3 or the Perl Artistic License
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// Version 2.0.
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`ifdef VERILATOR
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`define checkh(gotv,expv) do if ((gotv) !== (expv)) begin $write("%%Error: %s:%0d: got='h%x exp='h%x\n", `__FILE__,`__LINE__, (gotv), (expv)); $stop; end while(0)
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`else
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`define checkh(gotv,expv) do if ((gotv) !== (expv)) begin $write("%%Error: %s:%0d: got='h%x exp='h%x\n", `__FILE__,`__LINE__, (gotv), (expv)); end while(0)
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`endif
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module t (/*AUTOARG*/);
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int i_i [2:0];
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int o_i [2:0];
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import "DPI-C" function int dpii_failure();
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import "DPI-C" function void dpii_open_i(input int i [], output int o []);
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reg [95:0] crc;
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initial begin
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crc = 96'h8a10a572_5aef0c8d_d70a4497;
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i_i[0] = crc[31:0];
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i_i[1] = crc[63:32];
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i_i[2] = crc[95:64];
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dpii_open_i(i_i, o_i);
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`checkh(o_i[0], ~i_i[0]);
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`checkh(o_i[1], ~i_i[1]);
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`checkh(o_i[2], ~i_i[2]);
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if (dpii_failure()!=0) begin
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$write("%%Error: Failure in DPI tests\n");
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$stop;
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end
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else begin
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$write("*-* All Finished *-*\n");
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$finish;
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end
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end
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endmodule
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