verilator/test_regress/t/t_clk_first_deprecated.v
Stefan Wallentowitz 37dc33a195
Deprecation (#2088)
* Add deprecation warning

* Deprecate -msg in configuration files

* Deprecate sc_clock
2020-01-03 17:27:51 +01:00

14 lines
257 B
Systemverilog

// DESCRIPTION: Verilator: Verilog Test module
//
// This file ONLY is placed into the Public Domain, for any use,
// without warranty, 2003 by Wilson Snyder.
module t (/*AUTOARG*/
// Inputs
clk
);
input clk /*verilator sc_clock*/;
endmodule