Geza Lore 17cc452f79 Add V3VariableOrder pass ... A separate V3VariableOrder pass is now used to order module variables before Emit. All variables are now ordered together, without consideration for whether they are ports, signals form the design, or additional internal variables added by Verilator (which used to be ordered and emitted as separate groups in Emit). For single threaded models, this is performance neutral. For multi-threaded models, the MTask affinity based sorting was slightly modified, so variables with no MTask affinity are emitted last, otherwise the MTask affinity sets are sorted using the TSP sorter as before, but again, ports, signals, and internal variables are not differentiated. This yields a 2%+ speedup for the multithreaded model on OpenTitan.		2021-07-12 14:53:40 +01:00
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t	Add V3VariableOrder pass	2021-07-12 14:53:40 +01:00
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CMakeLists.txt
driver.pl	Tests: fail test if vcddiff aborts, fix failing tests	2021-07-01 23:22:25 +01:00
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