verilator/test_regress/t/t_trace_flag_off.v
2020-03-01 21:39:23 -05:00

14 lines
333 B
Systemverilog

// DESCRIPTION: Verilator: Verilog Test module
//
// This file ONLY is placed into the Public Domain, for any use,
// without warranty, 2020 by Wilson Snyder.
module t(/*AUTOARG*/);
initial begin
$dumpfile("/should/not/be/opened");
$dumpvars();
$write("*-* All Finished *-*\n");
$finish;
end
endmodule