forked from github/verilator
045ff25f80
Add very basic support for vpiModule. Basically it allows to traverse the module tree to find a variable etc. It does not support more than vpi_iterate and vpi_scan for vpiModule along basic operations like vpi_get_str on vpiModule. The support is added non-intrusively to non-VPI verilator runs. It essentially: - Tracks the creation of cell instances and keeps them alive until the emit phase. They are there converted to scopes if modules. - Emits empty (don't add anything during construction) VerilatedScopes for all inlined modules, only for those inlined modules that are on the hierarchical path to public variables. - Adds VerilatedHierarchy as abstraction to structure of the scopes. It is only created for VPI designs. It allows to traverse the hierarchy from the top (NULL). Signed-off-by: Stefan Wallentowitz <stefan@wallentowitz.de> Signed-off-by: Wilson Snyder <wsnyder@wsnyder.org> |
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| .. | ||
| t | ||
| .gdbinit | ||
| .gitignore | ||
| driver.pl | ||
| input.vc | ||
| input.xsim.vc | ||
| Makefile | ||
| Makefile_obj | ||
| vgen.pl | ||