verilator/docs/gen/ex_MULTIDRIVEN_faulty.rst
2021-05-19 08:14:14 -04:00

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ReStructuredText

.. comment: generated by t_lint_multidriven_bad
.. code-block:: sv
:linenos:
:emphasize-lines: 2,5
always @(posedge clk) begin
out2[7:0] <= d0; // <--- Warning
end
always @(negedge clk) begin
out2[15:8] <= d0; // <--- Warning
end