Wilson Snyder
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b9e67157c6
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With "--language VAMS" support a touch of Verilog AMS.
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2011-11-25 00:49:38 -05:00 |
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Wilson Snyder
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7ea8b54210
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Tests: Support atsim and cleanup verilator-only tests
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2010-03-18 12:03:08 -04:00 |
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Wilson Snyder
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58efab5cdf
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Add SystemVerilog 1800-2009 keywords
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2010-01-21 21:58:45 -05:00 |
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Wilson Snyder
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52912c6329
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Convert repository to git from svn.
- Change .cvsignore to .gitignore
- Remove Id metacomments
- Cleanup whitespace at end of lines
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2008-06-09 21:25:10 -04:00 |
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Wilson Snyder
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fabbfbc46e
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Add `begin_keywords support
git-svn-id: file://localhost/svn/verilator/trunk/verilator@894 77ca24e4-aefa-0310-84f0-b9a241c72d87
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2007-03-05 21:35:49 +00:00 |
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