Wilson Snyder
f540362e36
Fix expansion of back-slashed escaped macros, bug441.
2012-02-25 21:31:36 -05:00
Wilson Snyder
fab7924cc2
Fix block comment not separating identifiers, bug311.
2011-01-11 18:46:21 -05:00
Wilson Snyder
71c1f00ec2
Copyright year update
2011-01-01 18:21:19 -05:00
Wilson Snyder
42199bc8e5
Fix preprocessor `` of existing base define, bug283.
2010-09-20 15:20:16 -04:00
Wilson Snyder
1e938d0e90
Update preprocessor to match next Verilog-Perl version.
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Fix preprocessor preservation of newlines across macro substitutions.
Fix preprocessor stringification of nested macros.
Fix preprocessor whitespace on define arguments
2010-07-10 18:30:16 -04:00
Wilson Snyder
f3704f4c05
Tests: Rename includes to .vh extensions
2010-07-08 20:51:54 -04:00
Wilson Snyder
3841850168
Preproc: fix pass-through of `line enter-exit codes.
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Internals: Merge Verilog-Perl preproc changes through d450722.
2010-07-06 20:29:12 -04:00
Wilson Snyder
72218fb475
Defines with // comments still need continuation - spec ambiguity
2010-02-18 20:57:46 -05:00
Wilson Snyder
4df9d70e4a
Support 1800-2009 /*comments*/ in define values. Match Verilog-Perl
2010-01-28 09:41:24 -05:00
Wilson Snyder
af5aa38bc3
Fix `define argument mis-replacing system task of same name, bug191.
2009-11-23 14:26:04 -05:00
Wilson Snyder
d37cc5a160
Fix preprocessing commas in deep parameterized macros.
2009-09-17 22:00:17 -04:00
Wilson Snyder
4e522ab7f5
Fix define formal arguments that contain newlines, bug84.
2009-05-11 11:57:43 -04:00
Wilson Snyder
52912c6329
Convert repository to git from svn.
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- Change .cvsignore to .gitignore
- Remove Id metacomments
- Cleanup whitespace at end of lines
2008-06-09 21:25:10 -04:00
Wilson Snyder
9dade8fbd9
Fix parametrized defines calling define with comma. [Joshua Wise]
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git-svn-id: file://localhost/svn/verilator/trunk/verilator@1048 77ca24e4-aefa-0310-84f0-b9a241c72d87
2008-05-06 01:11:21 +00:00
Wilson Snyder
0c73b547f1
Fix bug introduced in 3.661 with parametrized defines.
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git-svn-id: file://localhost/svn/verilator/trunk/verilator@1042 77ca24e4-aefa-0310-84f0-b9a241c72d87
2008-04-25 14:01:50 +00:00
Wilson Snyder
a16477d84f
Fix SystemVerilog parameterized defines and whitespace
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git-svn-id: file://localhost/svn/verilator/trunk/verilator@1013 77ca24e4-aefa-0310-84f0-b9a241c72d87
2008-03-27 13:21:49 +00:00
Wilson Snyder
b5b1d94d4a
Copyright date update
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git-svn-id: file://localhost/svn/verilator/trunk/verilator@864 77ca24e4-aefa-0310-84f0-b9a241c72d87
2007-01-02 22:06:40 +00:00
Wilson Snyder
ce10dbd11c
Version bump
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git-svn-id: file://localhost/svn/verilator/trunk/verilator@753 77ca24e4-aefa-0310-84f0-b9a241c72d87
2006-08-26 11:35:28 +00:00
