Wilson Snyder
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d17f812827
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Fix BLKSEQ warnings on variables declared inside always.
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2012-01-19 21:15:21 -05:00 |
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Wilson Snyder
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1a15d41523
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Support jumps in program modules
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2011-10-27 19:13:24 -04:00 |
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Wilson Snyder
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e26a75c59d
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Fix internal error on non-inlined inout pins.
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2011-02-07 19:15:58 -05:00 |
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Wilson Snyder
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4df9d70e4a
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Support 1800-2009 /*comments*/ in define values. Match Verilog-Perl
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2010-01-28 09:41:24 -05:00 |
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Wilson Snyder
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584cfa4d4a
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Tests: Convert t_loop into test_regress format
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2009-07-21 10:42:10 -04:00 |
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Wilson Snyder
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be1a3f427e
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Support zero-width constants in concatenations.
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2009-06-30 11:54:07 -04:00 |
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Wilson Snyder
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3d06720628
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Copyright year update
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2009-01-02 11:47:39 -05:00 |
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Wilson Snyder
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1a60723d77
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Fix internal error on "output x; reg x = y;"
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2008-12-30 14:34:01 -05:00 |
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Wilson Snyder
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6aaef67e73
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Fix test_verilated running under ncsim
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2008-09-17 20:58:01 -04:00 |
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Wilson Snyder
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52912c6329
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Convert repository to git from svn.
- Change .cvsignore to .gitignore
- Remove Id metacomments
- Cleanup whitespace at end of lines
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2008-06-09 21:25:10 -04:00 |
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Wilson Snyder
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b4d9ccd9af
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Fix assignments of {a,b,c} = {c,b,a}
git-svn-id: file://localhost/svn/verilator/trunk/verilator@988 77ca24e4-aefa-0310-84f0-b9a241c72d87
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2008-02-20 16:54:41 +00:00 |
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Wilson Snyder
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c70add7d0f
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Fix user() not zeroing all 64 bits in graphalg
git-svn-id: file://localhost/svn/verilator/trunk/verilator@892 77ca24e4-aefa-0310-84f0-b9a241c72d87
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2007-03-05 13:52:21 +00:00 |
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Wilson Snyder
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7f515e6033
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Add --trace-depth option
git-svn-id: file://localhost/svn/verilator/trunk/verilator@876 77ca24e4-aefa-0310-84f0-b9a241c72d87
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2007-01-18 18:31:49 +00:00 |
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Wilson Snyder
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ce10dbd11c
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Version bump
git-svn-id: file://localhost/svn/verilator/trunk/verilator@753 77ca24e4-aefa-0310-84f0-b9a241c72d87
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2006-08-26 11:35:28 +00:00 |
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