forked from github/verilator
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README.adoc
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README.adoc
@ -88,11 +88,11 @@ interpreted Verilog simulators such as http://iverilog.icarus.com[Icarus
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Verilog]. Another 2-10x speedup might be gained from multithreading
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(yielding 200-1000x total over interpreted simulators).
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Verilator has typically similar or better performance versus the commercial
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Verilog simulators (Carbon Design Systems Carbonator, Modelsim, Cadence
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Incisive/NC-Verilog, Synopsys VCS, VTOC, and Pragmatic CVer/CVC). But,
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Verilator is open-sourced, so you can spend on computes rather than
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licenses. Thus Verilator gives you the best cycles/dollar.
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Verilator has typically similar or better performance versus the
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closed-source Verilog simulators (Carbon Design Systems Carbonator,
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Modelsim, Cadence Incisive/NC-Verilog, Synopsys VCS, VTOC, and Pragmatic
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CVer/CVC). But, Verilator is open-sourced, so you can spend on computes
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rather than licenses. Thus Verilator gives you the best cycles/dollar.
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For more information on how Verilator stacks up to some of the other
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closed-sourced and open-sourced Verilog simulators, see the
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