forked from github/verilator
Internal code coverage fixes
This commit is contained in:
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4cfa3f879a
commit
fbc814b54a
@ -42,6 +42,6 @@ remove_source("*examples/*");
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# Would just be removed with remove_source in later step
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remove_gcda_regexp(qr!test_regress/.*/(Vt_|Vtop_).*\.gcda!);
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exclude_line_regexp(qr/(\bv3fatalSrc\b|\bfatalSrc\b|\bVL_UNCOVERABLE\b|\bVL_FATAL|\bUASSERT\bERROR_RSVD_WORD\bV3ERROR_NA)/);
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exclude_line_regexp(qr/(\bv3fatalSrc\b|\bfatalSrc\b|\bVL_UNCOVERABLE\b|\bVL_FATAL|\bUASSERT|\bERROR_RSVD_WORD\bV3ERROR_NA)/);
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1;
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@ -1154,10 +1154,10 @@ string AstNode::locationStr() const {
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const AstNode* backp = this;
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int itmax = 10000; // Max iterations before giving up on location search
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while (backp) {
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if (--itmax < 0) {
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if (VL_UNCOVERABLE(--itmax < 0)) {
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// Likely some circular back link, and V3Ast is trying to report a low-level error
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UINFO(1, "Ran out of iterations finding locationStr on " << backp << endl);
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return "";
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return ""; // LCOV_EXCL_LINE
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}
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const AstScope* scopep;
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if ((scopep = VN_CAST_CONST(backp, Scope))) {
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@ -192,7 +192,8 @@ private:
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virtual void visit(AstVarRef* nodep) VL_OVERRIDE {
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if (!VarFlags(nodep->varp()).m_notOpt) {
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if (!m_cfuncp) { // Not in function, can't optimize
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clearOptimizable(nodep->varp(), "BVnofunc");
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// Perhaps impossible, but better safe
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clearOptimizable(nodep->varp(), "BVnofunc"); // LCOV_EXCL_LINE
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} else {
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// If we're scoping down to it, it isn't really in the same block
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if (!nodep->hierThis()) clearOptimizable(nodep->varp(), "HierRef");
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@ -2231,31 +2231,6 @@ V3Number& V3Number::opSelInto(const V3Number& lhs, int lsbval, int width) {
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return *this;
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}
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V3Number& V3Number::opCond(const V3Number& lhs, const V3Number& if1s, const V3Number& if0s) {
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NUM_ASSERT_OP_ARGS3(lhs, if1s, if0s);
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NUM_ASSERT_LOGIC_ARGS1(lhs);
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V3Number lhstrue(&lhs);
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lhstrue.opRedOr(lhs);
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if (lhstrue.bitIs0(0)) {
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this->opAssign(if0s);
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} else if (lhstrue.bitIs1(0)) {
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this->opAssign(if1s);
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} else { // select is "X/Z"
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setZero();
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NUM_ASSERT_LOGIC_ARGS2(if1s, if0s);
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for (int bit = 0; bit < this->width(); bit++) {
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if (if0s.bitIs1(bit) && if1s.bitIs1(bit)) {
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setBit(bit, 1);
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} else if (if0s.bitIs0(bit) && if1s.bitIs0(bit)) {
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setBit(bit, 0);
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} else {
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setBit(bit, 'x');
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}
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}
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}
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return *this;
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}
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//======================================================================
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// Ops - Floating point
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@ -334,7 +334,6 @@ public:
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V3Number& opSelInto(const V3Number& lhs, int lsbval, int width);
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V3Number& opToLowerN(const V3Number& lhs);
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V3Number& opToUpperN(const V3Number& lhs);
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V3Number& opCond(const V3Number& lhs, const V3Number& if1s, const V3Number& if0s);
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V3Number& opCaseEq(const V3Number& lhs, const V3Number& rhs);
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V3Number& opCaseNeq(const V3Number& lhs, const V3Number& rhs);
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V3Number& opWildEq(const V3Number& lhs, const V3Number& rhs);
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@ -1532,14 +1532,16 @@ void OrderVisitor::processDomainsIterate(OrderEitherVertex* vertexp) {
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} else if (domainp != fromVertexp->domainp()) {
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// Make a domain that merges the two domains
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bool ddebug = debug() >= 9;
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if (ddebug) {
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if (ddebug) { // LCOV_EXCL_START
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cout << endl;
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UINFO(0, " conflicting domain " << fromVertexp << endl);
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UINFO(0, " dorig=" << domainp << endl);
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domainp->dumpTree(cout);
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UINFO(0, " d2 =" << fromVertexp->domainp() << endl);
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fromVertexp->domainp()->dumpTree(cout);
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}
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} // LCOV_EXCL_STOP
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AstSenTree* newtreep = domainp->cloneTree(false);
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AstNodeSenItem* newtree2p = fromVertexp->domainp()->sensesp()->cloneTree(true);
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UASSERT_OBJ(newtree2p, fromVertexp->domainp(),
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@ -1549,13 +1551,13 @@ void OrderVisitor::processDomainsIterate(OrderEitherVertex* vertexp) {
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V3Const::constifyExpensiveEdit(newtreep); // Remove duplicates
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newtreep->multi(true); // Comment that it was made from 2 clock domains
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domainp = m_finder.getSenTree(domainp->fileline(), newtreep);
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if (ddebug) {
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if (ddebug) { // LCOV_EXCL_START
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UINFO(0, " dnew =" << newtreep << endl);
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newtreep->dumpTree(cout);
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UINFO(0, " find =" << domainp << endl);
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domainp->dumpTree(cout);
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cout << endl;
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}
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} // LCOV_EXCL_STOP
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VL_DO_DANGLING(newtreep->deleteTree(), newtreep);
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}
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}
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@ -341,9 +341,10 @@ void V3Os::u_sleep(int64_t usec) {
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int V3Os::system(const string& command) {
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UINFO(1, "Running system: " << command << endl);
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const int ret = ::system(command.c_str());
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if (ret == -1) {
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v3fatal("Failed to execute command:" << command << " " << strerror(errno));
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return -1;
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if (VL_UNCOVERABLE(ret == -1)) {
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v3fatal("Failed to execute command:" // LCOV_EXCL_LINE
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<< command << " " << strerror(errno));
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return -1; // LCOV_EXCL_LINE
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} else {
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UASSERT(WIFEXITED(ret), "system(" << command << ") returned unexpected value of " << ret);
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const int exit_code = WEXITSTATUS(ret);
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@ -227,7 +227,6 @@ public:
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// Interactions with lexer
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void lexNew();
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void lexDestroy();
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void statePop(); // Parser -> lexer communication
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static int stateVerilogRecent(); // Parser -> lexer communication
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int prevLexToken() { return m_prevLexToken; } // Parser -> lexer communication
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size_t flexPpInputToLex(char* buf, size_t max_size) { return ppInputToLex(buf, max_size); }
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@ -43,7 +43,6 @@ public:
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: V3LexerBase(NULL) {}
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~V3Lexer() {}
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// METHODS
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void statePop() { yy_pop_state(); }
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void unputString(const char* textp, size_t length) {
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// Add characters to input stream in back-to-front order
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const char* cp = textp;
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@ -51,8 +50,6 @@ public:
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}
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};
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void V3ParseImp::statePop() { parsep()->m_lexerp->statePop(); }
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void V3ParseImp::unputString(const char* textp, size_t length) {
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parsep()->m_lexerp->unputString(textp, length);
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}
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@ -103,7 +103,7 @@ protected:
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public:
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static V3PreProc* createPreProc(FileLine* fl);
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virtual ~V3PreProc() {}
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virtual ~V3PreProc() {} // LCOV_EXCL_LINE // Persistent
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};
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#endif // Guard
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@ -74,8 +74,8 @@ public:
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if (m_symPrefix != "") os << " symPrefix=" << m_symPrefix;
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os << " n=" << nodep();
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os << endl;
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if (doneSymsr.find(this) != doneSymsr.end()) {
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os << indent << "| ^ duplicate, so no children printed\n";
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if (VL_UNCOVERABLE(doneSymsr.find(this) != doneSymsr.end())) {
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os << indent << "| ^ duplicate, so no children printed\n"; // LCOV_EXCL_LINE
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} else {
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doneSymsr.insert(this);
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for (IdNameMap::const_iterator it = m_idNameMap.begin(); it != m_idNameMap.end();
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@ -41,10 +41,10 @@ private:
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m_dataSize *= 2;
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// UINFO(9, "Realloc "<<allocSize()<<" for "<<point<<" "<<cvtToHex(m_datap)<<endl);
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vluint64_t* newp = static_cast<vluint64_t*>(realloc(m_datap, allocSize()));
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if (!newp) {
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if (VL_UNCOVERABLE(!newp)) {
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// cppcheck-suppress doubleFree // cppcheck 1.90 bug - realloc doesn't free on fail
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free(m_datap);
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v3fatal("Out of memory increasing buckets");
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free(m_datap); // LCOV_EXCL_LINE
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v3fatal("Out of memory increasing buckets"); // LCOV_EXCL_LINE
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}
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m_datap = newp;
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for (vluint64_t i = oldsize; i < m_dataSize; i += 64) m_datap[i / 64] = 0;
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@ -49,9 +49,6 @@ extern void yyerrorf(const char* format, ...);
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yyerrorf("Unsupported: " language " reserved word not implemented: '%s'", yytext); \
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FL_BRK; } while(0)
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// See V3Read.cpp
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//void V3ParseImp::statePop() { yy_pop_state(); }
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//======================================================================
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void yyerror(const char* errmsg) {
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@ -52,7 +52,7 @@ hello, from a concatenated string.
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hello, from a concatenated format string [0].
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extra argument: 0
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0 : pre argument after
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[0] Embedded <#013> return
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[0] Embedded tab ' ' and <#013> return
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[0] Embedded
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multiline
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'23 23 23'
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@ -145,7 +145,7 @@ module t;
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$write("hel", "lo, fr", "om a concatenated format string [%0t].\n", $time);
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$display("extra argument: ", $time);
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$display($time,, ": pre argument",, "after");
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$write("[%0t] Embedded \r return\n", $time);
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$write("[%0t] Embedded tab '\t' and \r return\n", $time);
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$display("[%0t] Embedded\
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multiline", $time);
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@ -13,6 +13,7 @@ module submodule ();
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final begin
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$write("d");
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end
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final ; // Empty test
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endmodule
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module t ();
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10
test_regress/t/t_func_return_bad.out
Normal file
10
test_regress/t/t_func_return_bad.out
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@ -0,0 +1,10 @@
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%Error: t/t_func_return_bad.v:10:7: Return isn't underneath a task or function
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10 | return;
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| ^~~~~~
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%Error: t/t_func_return_bad.v:11:7: continue isn't underneath a loop
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11 | continue;
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| ^~~~~~~~
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%Error: t/t_func_return_bad.v:12:7: break isn't underneath a loop
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12 | break;
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| ^~~~~
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%Error: Exiting due to
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19
test_regress/t/t_func_return_bad.pl
Executable file
19
test_regress/t/t_func_return_bad.pl
Executable file
@ -0,0 +1,19 @@
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#!/usr/bin/env perl
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if (!$::Driver) { use FindBin; exec("$FindBin::Bin/bootstrap.pl", @ARGV, $0); die; }
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# DESCRIPTION: Verilator: Verilog Test driver/expect definition
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#
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# Copyright 2011 by Wilson Snyder. This program is free software; you
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# can redistribute it and/or modify it under the terms of either the GNU
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# Lesser General Public License Version 3 or the Perl Artistic License
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# Version 2.0.
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# SPDX-License-Identifier: LGPL-3.0-only OR Artistic-2.0
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scenarios(linter => 1);
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lint(
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fails => 1,
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expect_filename => $Self->{golden_filename},
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);
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ok(1);
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1;
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14
test_regress/t/t_func_return_bad.v
Normal file
14
test_regress/t/t_func_return_bad.v
Normal file
@ -0,0 +1,14 @@
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// DESCRIPTION: Verilator: Verilog Test module
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//
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// This file ONLY is placed under the Creative Commons Public Domain, for
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// any use, without warranty, 2011 by Wilson Snyder.
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// SPDX-License-Identifier: CC0-1.0
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module t (/*AUTOARG*/);
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initial begin
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return; // Not under function
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continue; // Not under loop
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break; // Not under loop
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end
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endmodule
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4
test_regress/t/t_lint_restore_prag_bad.out
Normal file
4
test_regress/t/t_lint_restore_prag_bad.out
Normal file
@ -0,0 +1,4 @@
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%Error: t/t_lint_restore_prag_bad.v:10:4: /*verilator lint_restore*/ without matching save.
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10 | /*verilator lint_restore*/
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| ^~~~~~~~~~~~~~~~~~~~~~~~~~
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%Error: Exiting due to
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19
test_regress/t/t_lint_restore_prag_bad.pl
Executable file
19
test_regress/t/t_lint_restore_prag_bad.pl
Executable file
@ -0,0 +1,19 @@
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#!/usr/bin/env perl
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if (!$::Driver) { use FindBin; exec("$FindBin::Bin/bootstrap.pl", @ARGV, $0); die; }
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# DESCRIPTION: Verilator: Verilog Test driver/expect definition
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#
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# Copyright 2003-2009 by Wilson Snyder. This program is free software; you
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# can redistribute it and/or modify it under the terms of either the GNU
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# Lesser General Public License Version 3 or the Perl Artistic License
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# Version 2.0.
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# SPDX-License-Identifier: LGPL-3.0-only OR Artistic-2.0
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scenarios(vlt => 1);
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lint(
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fails => 1,
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expect_filename => $Self->{golden_filename},
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);
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ok(1);
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1;
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12
test_regress/t/t_lint_restore_prag_bad.v
Normal file
12
test_regress/t/t_lint_restore_prag_bad.v
Normal file
@ -0,0 +1,12 @@
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// DESCRIPTION: Verilator: Verilog Test module
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//
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// This file ONLY is placed under the Creative Commons Public Domain, for
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// any use, without warranty, 2007 by Wilson Snyder.
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// SPDX-License-Identifier: CC0-1.0
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module t ();
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// No matching save
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// verilator lint_restore
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endmodule
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@ -51,6 +51,10 @@ module t (/*AUTOARG*/
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if (5'd10 != 5'D10) $stop;
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if (5'd10 != 5'H a) $stop;
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if (5'd10 != 5 'O 12) $stop;
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if (24'h29cbb8 != 24'o12345670) $stop;
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if (6'b111xxx !== 6'o7x) $stop;
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if (6'b111??? !== 6'o7?) $stop;
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if (6'b111zzz !== 6'o7z) $stop;
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//
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if (r_wide0 !== {32'haa111111,32'hbb222222,32'hcc333333,32'hdd444444}) $stop;
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if (r_wide1 !== {32'haa111111,32'hbb222222}) $stop;
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199
test_regress/t/t_vams_kwd_bad.out
Normal file
199
test_regress/t/t_vams_kwd_bad.out
Normal file
@ -0,0 +1,199 @@
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%Error: t/t_vams_kwd_bad.v:12:8: Unsupported: AMS reserved word not implemented: 'above'
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12 | int above;
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| ^~~~~
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%Error: t/t_vams_kwd_bad.v:12:13: syntax error, unexpected ';', expecting IDENTIFIER
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12 | int above;
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| ^
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%Error: t/t_vams_kwd_bad.v:13:8: Unsupported: AMS reserved word not implemented: 'abs'
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13 | int abs;
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| ^~~
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%Error: t/t_vams_kwd_bad.v:14:8: Unsupported: AMS reserved word not implemented: 'absdelay'
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14 | int absdelay;
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| ^~~~~~~~
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%Error: t/t_vams_kwd_bad.v:15:8: Unsupported: AMS reserved word not implemented: 'abstol'
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15 | int abstol;
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| ^~~~~~
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%Error: t/t_vams_kwd_bad.v:16:8: Unsupported: AMS reserved word not implemented: 'ac_stim'
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16 | int ac_stim;
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| ^~~~~~~
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%Error: t/t_vams_kwd_bad.v:17:8: Unsupported: AMS reserved word not implemented: 'access'
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17 | int access;
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| ^~~~~~
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%Error: t/t_vams_kwd_bad.v:18:8: Unsupported: AMS reserved word not implemented: 'acos'
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18 | int acos;
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| ^~~~
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%Error: t/t_vams_kwd_bad.v:19:8: Unsupported: AMS reserved word not implemented: 'acosh'
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19 | int acosh;
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| ^~~~~
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%Error: t/t_vams_kwd_bad.v:20:8: Unsupported: AMS reserved word not implemented: 'aliasparam'
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20 | int aliasparam;
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| ^~~~~~~~~~
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%Error: t/t_vams_kwd_bad.v:21:8: Unsupported: AMS reserved word not implemented: 'analog'
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21 | int analog;
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| ^~~~~~
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%Error: t/t_vams_kwd_bad.v:22:8: Unsupported: AMS reserved word not implemented: 'analysis'
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22 | int analysis;
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| ^~~~~~~~
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%Error: t/t_vams_kwd_bad.v:23:8: Unsupported: AMS reserved word not implemented: 'assert'
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23 | int assert;
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| ^~~~~~
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%Error: t/t_vams_kwd_bad.v:24:8: Unsupported: AMS reserved word not implemented: 'branch'
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24 | int branch;
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| ^~~~~~
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%Error: t/t_vams_kwd_bad.v:25:8: Unsupported: AMS reserved word not implemented: 'connect'
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25 | int connect;
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| ^~~~~~~
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%Error: t/t_vams_kwd_bad.v:26:8: Unsupported: AMS reserved word not implemented: 'connectmodule'
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26 | int connectmodule;
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| ^~~~~~~~~~~~~
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%Error: t/t_vams_kwd_bad.v:27:8: Unsupported: AMS reserved word not implemented: 'connectrules'
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27 | int connectrules;
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| ^~~~~~~~~~~~
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%Error: t/t_vams_kwd_bad.v:28:8: Unsupported: AMS reserved word not implemented: 'continuous'
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28 | int continuous;
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| ^~~~~~~~~~
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%Error: t/t_vams_kwd_bad.v:29:8: Unsupported: AMS reserved word not implemented: 'cross'
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29 | int cross;
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| ^~~~~
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%Error: t/t_vams_kwd_bad.v:30:8: Unsupported: AMS reserved word not implemented: 'ddt'
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||||
30 | int ddt;
|
||||
| ^~~
|
||||
%Error: t/t_vams_kwd_bad.v:31:8: Unsupported: AMS reserved word not implemented: 'ddt_nature'
|
||||
31 | int ddt_nature;
|
||||
| ^~~~~~~~~~
|
||||
%Error: t/t_vams_kwd_bad.v:32:8: Unsupported: AMS reserved word not implemented: 'ddx'
|
||||
32 | int ddx;
|
||||
| ^~~
|
||||
%Error: t/t_vams_kwd_bad.v:33:8: Unsupported: AMS reserved word not implemented: 'discipline'
|
||||
33 | int discipline;
|
||||
| ^~~~~~~~~~
|
||||
%Error: t/t_vams_kwd_bad.v:34:8: Unsupported: AMS reserved word not implemented: 'discrete'
|
||||
34 | int discrete;
|
||||
| ^~~~~~~~
|
||||
%Error: t/t_vams_kwd_bad.v:35:8: Unsupported: AMS reserved word not implemented: 'domain'
|
||||
35 | int domain;
|
||||
| ^~~~~~
|
||||
%Error: t/t_vams_kwd_bad.v:36:8: Unsupported: AMS reserved word not implemented: 'driver_update'
|
||||
36 | int driver_update;
|
||||
| ^~~~~~~~~~~~~
|
||||
%Error: t/t_vams_kwd_bad.v:37:8: Unsupported: AMS reserved word not implemented: 'endconnectrules'
|
||||
37 | int endconnectrules;
|
||||
| ^~~~~~~~~~~~~~~
|
||||
%Error: t/t_vams_kwd_bad.v:38:8: Unsupported: AMS reserved word not implemented: 'enddiscipline'
|
||||
38 | int enddiscipline;
|
||||
| ^~~~~~~~~~~~~
|
||||
%Error: t/t_vams_kwd_bad.v:39:8: Unsupported: AMS reserved word not implemented: 'endnature'
|
||||
39 | int endnature;
|
||||
| ^~~~~~~~~
|
||||
%Error: t/t_vams_kwd_bad.v:40:8: Unsupported: AMS reserved word not implemented: 'endparamset'
|
||||
40 | int endparamset;
|
||||
| ^~~~~~~~~~~
|
||||
%Error: t/t_vams_kwd_bad.v:41:8: Unsupported: AMS reserved word not implemented: 'exclude'
|
||||
41 | int exclude;
|
||||
| ^~~~~~~
|
||||
%Error: t/t_vams_kwd_bad.v:42:8: Unsupported: AMS reserved word not implemented: 'final_step'
|
||||
42 | int final_step;
|
||||
| ^~~~~~~~~~
|
||||
%Error: t/t_vams_kwd_bad.v:43:8: Unsupported: AMS reserved word not implemented: 'flicker_noise'
|
||||
43 | int flicker_noise;
|
||||
| ^~~~~~~~~~~~~
|
||||
%Error: t/t_vams_kwd_bad.v:44:8: Unsupported: AMS reserved word not implemented: 'flow'
|
||||
44 | int flow;
|
||||
| ^~~~
|
||||
%Error: t/t_vams_kwd_bad.v:45:8: Unsupported: AMS reserved word not implemented: 'from'
|
||||
45 | int from;
|
||||
| ^~~~
|
||||
%Error: t/t_vams_kwd_bad.v:46:8: Unsupported: AMS reserved word not implemented: 'ground'
|
||||
46 | int ground;
|
||||
| ^~~~~~
|
||||
%Error: t/t_vams_kwd_bad.v:47:8: Unsupported: AMS reserved word not implemented: 'idt'
|
||||
47 | int idt;
|
||||
| ^~~
|
||||
%Error: t/t_vams_kwd_bad.v:48:8: Unsupported: AMS reserved word not implemented: 'idt_nature'
|
||||
48 | int idt_nature;
|
||||
| ^~~~~~~~~~
|
||||
%Error: t/t_vams_kwd_bad.v:49:8: Unsupported: AMS reserved word not implemented: 'idtmod'
|
||||
49 | int idtmod;
|
||||
| ^~~~~~
|
||||
%Error: t/t_vams_kwd_bad.v:50:8: Unsupported: AMS reserved word not implemented: 'inf'
|
||||
50 | int inf;
|
||||
| ^~~
|
||||
%Error: t/t_vams_kwd_bad.v:51:8: Unsupported: AMS reserved word not implemented: 'initial_step'
|
||||
51 | int initial_step;
|
||||
| ^~~~~~~~~~~~
|
||||
%Error: t/t_vams_kwd_bad.v:52:8: Unsupported: AMS reserved word not implemented: 'laplace_nd'
|
||||
52 | int laplace_nd;
|
||||
| ^~~~~~~~~~
|
||||
%Error: t/t_vams_kwd_bad.v:53:8: Unsupported: AMS reserved word not implemented: 'laplace_np'
|
||||
53 | int laplace_np;
|
||||
| ^~~~~~~~~~
|
||||
%Error: t/t_vams_kwd_bad.v:54:8: Unsupported: AMS reserved word not implemented: 'laplace_zd'
|
||||
54 | int laplace_zd;
|
||||
| ^~~~~~~~~~
|
||||
%Error: t/t_vams_kwd_bad.v:55:8: Unsupported: AMS reserved word not implemented: 'laplace_zp'
|
||||
55 | int laplace_zp;
|
||||
| ^~~~~~~~~~
|
||||
%Error: t/t_vams_kwd_bad.v:56:8: Unsupported: AMS reserved word not implemented: 'last_crossing'
|
||||
56 | int last_crossing;
|
||||
| ^~~~~~~~~~~~~
|
||||
%Error: t/t_vams_kwd_bad.v:57:8: Unsupported: AMS reserved word not implemented: 'limexp'
|
||||
57 | int limexp;
|
||||
| ^~~~~~
|
||||
%Error: t/t_vams_kwd_bad.v:58:8: Unsupported: AMS reserved word not implemented: 'max'
|
||||
58 | int max;
|
||||
| ^~~
|
||||
%Error: t/t_vams_kwd_bad.v:59:8: Unsupported: AMS reserved word not implemented: 'merged'
|
||||
59 | int merged;
|
||||
| ^~~~~~
|
||||
%Error: t/t_vams_kwd_bad.v:60:8: Unsupported: AMS reserved word not implemented: 'min'
|
||||
60 | int min;
|
||||
| ^~~
|
||||
%Error: t/t_vams_kwd_bad.v:61:8: Unsupported: AMS reserved word not implemented: 'nature'
|
||||
61 | int nature;
|
||||
| ^~~~~~
|
||||
%Error: t/t_vams_kwd_bad.v:62:8: Unsupported: AMS reserved word not implemented: 'net_resolution'
|
||||
62 | int net_resolution;
|
||||
| ^~~~~~~~~~~~~~
|
||||
%Error: t/t_vams_kwd_bad.v:63:8: Unsupported: AMS reserved word not implemented: 'noise_table'
|
||||
63 | int noise_table;
|
||||
| ^~~~~~~~~~~
|
||||
%Error: t/t_vams_kwd_bad.v:64:8: Unsupported: AMS reserved word not implemented: 'paramset'
|
||||
64 | int paramset;
|
||||
| ^~~~~~~~
|
||||
%Error: t/t_vams_kwd_bad.v:65:8: Unsupported: AMS reserved word not implemented: 'potential'
|
||||
65 | int potential;
|
||||
| ^~~~~~~~~
|
||||
%Error: t/t_vams_kwd_bad.v:66:8: Unsupported: AMS reserved word not implemented: 'resolveto'
|
||||
66 | int resolveto;
|
||||
| ^~~~~~~~~
|
||||
%Error: t/t_vams_kwd_bad.v:67:8: Unsupported: AMS reserved word not implemented: 'slew'
|
||||
67 | int slew;
|
||||
| ^~~~
|
||||
%Error: t/t_vams_kwd_bad.v:68:8: Unsupported: AMS reserved word not implemented: 'split'
|
||||
68 | int split;
|
||||
| ^~~~~
|
||||
%Error: t/t_vams_kwd_bad.v:69:8: Unsupported: AMS reserved word not implemented: 'timer'
|
||||
69 | int timer;
|
||||
| ^~~~~
|
||||
%Error: t/t_vams_kwd_bad.v:70:8: Unsupported: AMS reserved word not implemented: 'transition'
|
||||
70 | int transition;
|
||||
| ^~~~~~~~~~
|
||||
%Error: t/t_vams_kwd_bad.v:71:8: Unsupported: AMS reserved word not implemented: 'units'
|
||||
71 | int units;
|
||||
| ^~~~~
|
||||
%Error: t/t_vams_kwd_bad.v:72:8: Unsupported: AMS reserved word not implemented: 'white_noise'
|
||||
72 | int white_noise;
|
||||
| ^~~~~~~~~~~
|
||||
%Error: t/t_vams_kwd_bad.v:73:8: Unsupported: AMS reserved word not implemented: 'zi_nd'
|
||||
73 | int zi_nd;
|
||||
| ^~~~~
|
||||
%Error: t/t_vams_kwd_bad.v:74:8: Unsupported: AMS reserved word not implemented: 'zi_np'
|
||||
74 | int zi_np;
|
||||
| ^~~~~
|
||||
%Error: t/t_vams_kwd_bad.v:75:8: Unsupported: AMS reserved word not implemented: 'zi_zd'
|
||||
75 | int zi_zd;
|
||||
| ^~~~~
|
||||
%Error: t/t_vams_kwd_bad.v:76:8: Unsupported: AMS reserved word not implemented: 'zi_zp'
|
||||
76 | int zi_zp;
|
||||
| ^~~~~
|
||||
%Error: Exiting due to
|
20
test_regress/t/t_vams_kwd_bad.pl
Executable file
20
test_regress/t/t_vams_kwd_bad.pl
Executable file
@ -0,0 +1,20 @@
|
||||
#!/usr/bin/env perl
|
||||
if (!$::Driver) { use FindBin; exec("$FindBin::Bin/bootstrap.pl", @ARGV, $0); die; }
|
||||
# DESCRIPTION: Verilator: Verilog Test driver/expect definition
|
||||
#
|
||||
# Copyright 2019 by Wilson Snyder. This program is free software; you
|
||||
# can redistribute it and/or modify it under the terms of either the GNU
|
||||
# Lesser General Public License Version 3 or the Perl Artistic License
|
||||
# Version 2.0.
|
||||
# SPDX-License-Identifier: LGPL-3.0-only OR Artistic-2.0
|
||||
|
||||
scenarios(vlt => 1);
|
||||
|
||||
lint(
|
||||
fails => 1,
|
||||
verilator_flags2 => ["--error-limit 1000"],
|
||||
expect_filename => $Self->{golden_filename},
|
||||
);
|
||||
|
||||
ok(1);
|
||||
1;
|
78
test_regress/t/t_vams_kwd_bad.v
Normal file
78
test_regress/t/t_vams_kwd_bad.v
Normal file
@ -0,0 +1,78 @@
|
||||
// DESCRIPTION: Verilator: Verilog Test module
|
||||
//
|
||||
// This file ONLY is placed into the Public Domain, for any use,
|
||||
// without warranty, 2019 by Driss Hafdi.
|
||||
// SPDX-License-Identifier: CC0-1.0
|
||||
|
||||
`begin_keywords "VAMS-2.3"
|
||||
|
||||
module t (/*AUTOARG*/);
|
||||
|
||||
// Just get errors on bad keywords (for code coverage)
|
||||
int above;
|
||||
int abs;
|
||||
int absdelay;
|
||||
int abstol;
|
||||
int ac_stim;
|
||||
int access;
|
||||
int acos;
|
||||
int acosh;
|
||||
int aliasparam;
|
||||
int analog;
|
||||
int analysis;
|
||||
int assert;
|
||||
int branch;
|
||||
int connect;
|
||||
int connectmodule;
|
||||
int connectrules;
|
||||
int continuous;
|
||||
int cross;
|
||||
int ddt;
|
||||
int ddt_nature;
|
||||
int ddx;
|
||||
int discipline;
|
||||
int discrete;
|
||||
int domain;
|
||||
int driver_update;
|
||||
int endconnectrules;
|
||||
int enddiscipline;
|
||||
int endnature;
|
||||
int endparamset;
|
||||
int exclude;
|
||||
int final_step;
|
||||
int flicker_noise;
|
||||
int flow;
|
||||
int from;
|
||||
int ground;
|
||||
int idt;
|
||||
int idt_nature;
|
||||
int idtmod;
|
||||
int inf;
|
||||
int initial_step;
|
||||
int laplace_nd;
|
||||
int laplace_np;
|
||||
int laplace_zd;
|
||||
int laplace_zp;
|
||||
int last_crossing;
|
||||
int limexp;
|
||||
int max;
|
||||
int merged;
|
||||
int min;
|
||||
int nature;
|
||||
int net_resolution;
|
||||
int noise_table;
|
||||
int paramset;
|
||||
int potential;
|
||||
int resolveto;
|
||||
int slew;
|
||||
int split;
|
||||
int timer;
|
||||
int transition;
|
||||
int units;
|
||||
int white_noise;
|
||||
int zi_nd;
|
||||
int zi_np;
|
||||
int zi_zd;
|
||||
int zi_zp;
|
||||
|
||||
endmodule
|
Loading…
Reference in New Issue
Block a user