diff --git a/bin/verilator b/bin/verilator index a50e353bb..62f7be232 100755 --- a/bin/verilator +++ b/bin/verilator @@ -284,33 +284,34 @@ detailed descriptions of these arguments. --bbox-unsup Blackbox unsupported language features --bin Override Verilator binary --build Build model executable/library after Verilation - -CFLAGS C++ compiler arguments for makefile --cc Create C++ output --cdc Clock domain crossing analysis + -CFLAGS C++ compiler arguments for makefile --clk Mark specified signal as clock - --make Generate scripts for specified build tool + --no-clk Prevent marking specified signal as clock --compiler Tune for specified C++ compiler --converge-limit Tune convergence settle time --coverage Enable all coverage --coverage-line Enable line coverage --coverage-max-width Maximum array depth for coverage --coverage-toggle Enable toggle coverage - --coverage-user Enable SVL user coverage --coverage-underscore Enable coverage of _signals + --coverage-user Enable SVL user coverage -D[=] Set preprocessor define --debug Enable debugging --debug-check Enable debugging assertions --no-debug-leak Disable leaking memory in --debug mode --debugi Enable debugging at a specified level --debugi- Enable debugging a source file at a level + --no-decoration Disable comments and symbol decorations --default-language Default language to parse +define+= Set preprocessor define --dpi-hdr-only Only produce the DPI header file --dump-defines Show preprocessor defines with -E --dump-tree Enable dumping .tree files + --dump-tree-addrids Use short identifiers instead of addresses --dump-treei Enable dumping .tree files at a level --dump-treei- Enable dumping .tree file at a source file at a level - --dump-tree-addrids Use short identifiers instead of addresses -E Preprocess, but do not compile --error-limit Abort after this number of errors --exe Link to create executable @@ -321,6 +322,7 @@ detailed descriptions of these arguments. --flatten Force inlining of all modules, tasks and functions -fno- Disable internal optimization stage -G= Overwrite top-level parameter + --gate-stmts Tune gate optimizer depth --gdb Run Verilator under GDB interactively --gdbbt Run Verilator under GDB for backtrace --generate-key Create random key for --protect-key @@ -328,54 +330,50 @@ detailed descriptions of these arguments. --help Display this help --hierarchical Enable hierarchical Verilation -I Directory to search for includes - -j Parallelism for --build - --gate-stmts Tune gate optimizer depth --if-depth Tune IFDEPTH warning +incdir+ Directory to search for includes --inline-mult Tune module inlining --instr-count-dpi Assumed dynamic instruction count of DPI imports - -LDFLAGS Linker pre-object arguments for makefile + -j Parallelism for --build --l2-name Verilog scope name of the top module --language Default language standard to parse + -LDFLAGS Linker pre-object arguments for makefile --lib-create Create a DPI library +libext++[ext]... Extensions for finding modules --lint-only Lint, but do not make output + --make Generate scripts for specified build tool -MAKEFLAGS Arguments to pass to make during --build --max-num-width Maximum number width (default: 64K) - --MMD Create .d dependency files - --MP Create phony dependency targets --Mdir Name of output object directory + --MMD Create .d dependency files --mod-prefix Name to prepend to lower classes - --no-clk Prevent marking specified signal as clock - --no-decoration Disable comments and symbol decorations - --no-pins64 Don't use uint64_t's for 33-64 bit sigs - --no-skip-identical Disable skipping identical output + --MP Create phony dependency targets +notimingchecks Ignored -O0 Disable optimizations -O3 High performance optimizations -O Selectable optimizations -o Name of final executable --no-order-clock-delay Disable ordering clock enable assignments - --no-verilate Skip verilation and just compile previously Verilated code. --output-split Split .cpp files into pieces --output-split-cfuncs Split model functions --output-split-ctrace Split tracing functions -P Disable line numbers and blanks with -E --pins-bv Specify types for top level ports - --pins-sc-uint Specify types for top level ports --pins-sc-biguint Specify types for top level ports + --pins-sc-uint Specify types for top level ports --pins-uint8 Specify types for top level ports + --no-pins64 Don't use uint64_t's for 33-64 bit sigs --pipe-filter Filter all input through a script --pp-comments Show preprocessor comments with -E --prefix Name of top level class + --private Debugging; see docs --prof-c Compile C++ code with profiling --prof-cfuncs Name functions for profiling --prof-exec Enable generating execution profile for gantt chart --prof-pgo Enable generating profiling data for PGO - --protect-key Key for symbol protection --protect-ids Hash identifier names for obscurity + --protect-key Key for symbol protection --protect-lib Create a DPI protected library - --private Debugging; see docs --public Debugging; see docs --public-flat-rw Mark all variables, etc as public_flat_rw -pvalue+= Overwrite toplevel parameter @@ -386,6 +384,7 @@ detailed descriptions of these arguments. --rr Run Verilator and record with rr --savable Enable model save-restore --sc Create SystemC output + --no-skip-identical Disable skipping identical output --stats Create statistics file --stats-vars Provide statistics on variables -sv Enable SystemVerilog parsing @@ -413,6 +412,7 @@ detailed descriptions of these arguments. --unused-regexp Tune UNUSED lint signals -V Verbose version and config -v Verilog library + --no-verilate Skip verilation and just compile previously Verilated code. +verilog1995ext+ Synonym for +1364-1995ext+ +verilog2001ext+ Synonym for +1364-2001ext+ --version Displays program version and exits @@ -427,6 +427,9 @@ detailed descriptions of these arguments. -Wno-lint Disable all lint warnings -Wno-style Disable all style warnings -Wpedantic Warn on compliance-test issues + -Wwarn- Enable specified warning message + -Wwarn-lint Enable lint warning message + -Wwarn-style Enable style warning message --x-assign Assign non-initial Xs to this value --x-initial Assign initial Xs to this value --x-initial-edge Enable initial X->0 and X->1 edge triggers diff --git a/docs/guide/exe_verilator.rst b/docs/guide/exe_verilator.rst index bf99a7d65..5e1c6282f 100644 --- a/docs/guide/exe_verilator.rst +++ b/docs/guide/exe_verilator.rst @@ -129,16 +129,6 @@ Summary: is also used). Verilator manages the build itself, and for this --build requires GNU Make to be available on the platform. -.. option:: -CFLAGS - - Add specified C compiler argument to the generated makefiles. For - multiple flags either pass them as a single argument with space - separators quoted in the shell (:command:`-CFLAGS "-a -b"`), or use - multiple -CFLAGS options (:command:`-CFLAGS -a -CFLAGS -b`). - - When make is run on the generated makefile these will be passed to the - C++ compiler (g++/clang++/msvc++). - .. option:: --cc Specifies C++ without SystemC output mode; see also :vlopt:`--sc` @@ -156,6 +146,16 @@ Summary: have interest in adding more traditional CDC checks, please contact the authors. +.. option:: -CFLAGS + + Add specified C compiler argument to the generated makefiles. For + multiple flags either pass them as a single argument with space + separators quoted in the shell (:command:`-CFLAGS "-a -b"`), or use + multiple -CFLAGS options (:command:`-CFLAGS -a -CFLAGS -b`). + + When make is run on the generated makefile these will be passed to the + C++ compiler (g++/clang++/msvc++). + .. option:: --clk With :vlopt:`--clk`, the specified signal-name is taken as a root clock @@ -179,6 +179,11 @@ Summary: remove it from the combinatorial logic reevaluation checking code. This may greatly improve performance. +.. option:: --no-clk + + Prevent the specified signal from being marked as clock. See + :vlopt:`--clk`. + .. option:: --compiler Enables workarounds for the specified C++ compiler (list below). @@ -288,6 +293,13 @@ Summary: <--debugi>`). Higher levels produce more detailed messages. See :vlopt:`--debug` for other implications of enabling debug. +.. option:: --no-decoration + + When creating output Verilated code, minimize comments, white space, + symbol names and other decorative items, at the cost of greatly reduced + readability. This may assist C++ compile times. This will not typically + change the ultimate model's performance, but may in some cases. + .. option:: --default-language Select the language to be used by default when first processing each @@ -585,21 +597,6 @@ Summary: to limit the number of parallel build jobs but attempt to execute all independent build steps in parallel. -.. option:: -LDFLAGS - - Add specified C linker arguments to the generated makefiles. For multiple - flags either pass them as a single argument with space separators quoted - in the shell (``-LDFLAGS "-a -b"``), or use multiple -LDFLAGS arguments - (``-LDFLAGS -a -LDFLAGS -b``). - - When make is run on the generated makefile these will be passed to the - C++ linker (ld) **after** the primary file being linked. This flag is - called :vlopt:`-LDFLAGS` as that's the traditional name in simulators; - it's would have been better called LDLIBS as that's the Makefile - variable it controls. (In Make, LDFLAGS is before the first object, - LDLIBS after. -L libraries need to be in the Make variable LDLIBS, not - LDFLAGS.) - .. option:: --l2-name Instead of using the module name when showing Verilog scope, use the @@ -616,12 +613,20 @@ Summary: A synonym for :vlopt:`--default-language`, for compatibility with other tools and earlier versions of Verilator. -.. option:: +libext+[+][...] +.. option:: -LDFLAGS - Specify the extensions that should be used for finding modules. If for - example module "my" is referenced, look in :file:`my.`. Note - "+libext+" is fairly standard across Verilog tools. Defaults to - ".v+.sv". + Add specified C linker arguments to the generated makefiles. For multiple + flags either pass them as a single argument with space separators quoted + in the shell (``-LDFLAGS "-a -b"``), or use multiple -LDFLAGS arguments + (``-LDFLAGS -a -LDFLAGS -b``). + + When make is run on the generated makefile these will be passed to the + C++ linker (ld) **after** the primary file being linked. This flag is + called :vlopt:`-LDFLAGS` as that's the traditional name in simulators; + it's would have been better called LDLIBS as that's the Makefile + variable it controls. (In Make, LDFLAGS is before the first object, + LDLIBS after. -L libraries need to be in the Make variable LDLIBS, not + LDFLAGS.) .. option:: --lib-create @@ -640,6 +645,13 @@ Summary: See also :vlopt:`--protect-lib`. +.. option:: +libext+[+][...] + + Specify the extensions that should be used for finding modules. If for + example module "my" is referenced, look in :file:`my.`. Note + "+libext+" is fairly standard across Verilog tools. Defaults to + ".v+.sv". + .. option:: --lint-only Check the files for lint violations only, do not create any other @@ -678,17 +690,6 @@ Summary: Set the maximum number literal width (e.g. in 1024'd22 this it the 1024). Defaults to 64K. -.. option:: --MMD =item --no-MMD - - Enable/disable creation of .d dependency files, used for make dependency - detection, similar to gcc -MMD option. By default this option is - enabled for :vlopt:`--cc` or :vlopt:`--sc` modes. - -.. option:: --MP - - When creating .d dependency files with :vlopt:`--MMD` option, make phony - targets. Similar to :command:`gcc -MP` option. - .. option:: --Mdir Specifies the name of the Make object directory. All generated files @@ -696,33 +697,23 @@ Summary: The directory is created if it does not exist and the parent directories exist; otherwise manually create the Mdir before calling Verilator. +.. option:: --MMD + +.. option:: --no-MMD + + Enable/disable creation of .d dependency files, used for make dependency + detection, similar to gcc -MMD option. By default this option is + enabled for :vlopt:`--cc` or :vlopt:`--sc` modes. + .. option:: --mod-prefix Specifies the name to prepend to all lower level classes. Defaults to the same as :vlopt:`--prefix`. -.. option:: --no-clk +.. option:: --MP - Prevent the specified signal from being marked as clock. See - :vlopt:`--clk`. - -.. option:: --no-decoration - - When creating output Verilated code, minimize comments, white space, - symbol names and other decorative items, at the cost of greatly reduced - readability. This may assist C++ compile times. This will not typically - change the ultimate model's performance, but may in some cases. - -.. option:: --no-pins64 - - Backward compatible alias for :vlopt:`--pins-bv 33 <--pins-bv>`. - -.. option:: --no-skip-identical =item --skip-identical - - Rarely needed. Disables or enables skipping execution of Verilator if - all source files are identical, and all output files exist with newer - dates. By default this option is enabled for :vlopt:`--cc` or - :vlopt:`--sc` modes only. + When creating .d dependency files with :vlopt:`--MMD` option, make phony + targets. Similar to :command:`gcc -MP` option. .. option:: +notimingchecks @@ -801,11 +792,6 @@ Summary: With :vlopt:`-E`, disable generation of :code:`&96;line` markers and blank lines, similar to :command:`gcc -P`. -.. option:: --pins64 - - Backward compatible alias for :vlopt:`--pins-bv 65 <--pins-bv>`. Note - that's a 65, not a 64. - .. option:: --pins-bv Specifies SystemC inputs/outputs of greater than or equal to @@ -838,6 +824,15 @@ Summary: of uint32_t. Likewise pins of width 9-16 will use uint16_t instead of uint32_t. +.. option:: --pins64 + + Backward compatible alias for :vlopt:`--pins-bv 65 <--pins-bv>`. Note + that's a 65, not a 64. + +.. option:: --no-pins64 + + Backward compatible alias for :vlopt:`--pins-bv 33 <--pins-bv>`. + .. option:: --pipe-filter Rarely needed. Verilator will spawn the specified command as a @@ -867,6 +862,11 @@ Summary: prepended to the name of the :vlopt:`--top` option, or V prepended to the first Verilog filename passed on the command line. +.. option:: --private + + Opposite of :vlopt:`--public`. Is the default; this option exists for + backwards compatibility. + .. option:: --prof-c When compiling the C++ code, enable the compiler's profiling flag @@ -900,23 +900,6 @@ Summary: Deprecated. Same as --prof-exec and --prof-pgo together. -.. option:: --protect-key - - Specifies the private key for :vlopt:`--protect-ids`. For best security - this key should be 16 or more random bytes, a reasonable secure choice - is the output of :command:`verilator --generate-key` . Typically, a key - would be created by the user once for a given protected design library, - then every Verilator run for subsequent versions of that library would - be passed the same :vlopt:`--protect-key`. Thus, if the input Verilog is - similar between library versions (Verilator runs), the Verilated code - will likewise be mostly similar. - - If :vlopt:`--protect-key` is not specified and a key is needed, - Verilator will generate a new key for every Verilator run. As the key is - not saved, this is best for security, but means every Verilator run will - give vastly different output even for identical input, perhaps harming - compile times (and certainly thrashing any "ccache"). - .. option:: --protect-ids Hash any private identifiers (variable, module, and assertion block @@ -937,6 +920,23 @@ Summary: prototypes. Use of the VPI is not recommended as many design details may be exposed, and an INSECURE warning will be issued. +.. option:: --protect-key + + Specifies the private key for :vlopt:`--protect-ids`. For best security + this key should be 16 or more random bytes, a reasonable secure choice + is the output of :command:`verilator --generate-key` . Typically, a key + would be created by the user once for a given protected design library, + then every Verilator run for subsequent versions of that library would + be passed the same :vlopt:`--protect-key`. Thus, if the input Verilog is + similar between library versions (Verilator runs), the Verilated code + will likewise be mostly similar. + + If :vlopt:`--protect-key` is not specified and a key is needed, + Verilator will generate a new key for every Verilator run. As the key is + not saved, this is best for security, but means every Verilator run will + give vastly different output even for identical input, perhaps harming + compile times (and certainly thrashing any "ccache"). + .. option:: --protect-lib Produces a DPI library similar to :vlopt:`--lib-create`, but hides @@ -948,11 +948,6 @@ Summary: in the distribution for a demonstration of how to build and use the DPI library. -.. option:: --private - - Opposite of :vlopt:`--public`. Is the default; this option exists for - backwards compatibility. - .. option:: --public This is only for historical debug use. Using it may result in @@ -1045,6 +1040,15 @@ Summary: Specifies SystemC output mode; see also :vlopt:`--cc` option. +.. option:: --skip-identical + +.. option:: --no-skip-identical + + Rarely needed. Disables or enables skipping execution of Verilator if + all source files are identical, and all output files exist with newer + dates. By default this option is enabled for :vlopt:`--cc` or + :vlopt:`--sc` modes only. + .. option:: --stats Creates a dump file with statistics on the design in