diff --git a/src/verilog.y b/src/verilog.y
index 8f69e21fe..55ae4f866 100644
--- a/src/verilog.y
+++ b/src/verilog.y
@@ -1379,13 +1379,13 @@ port<nodep>:			// ==IEEE: port
 			{ $$=$2; /*VARDTYPE-same*/ $$->addNextNull(VARDONEP($$,$3,$4)); }
 	//
 	|	portDirNetE data_type           portSig variable_dimensionListE sigAttrListE '=' constExpr
-			{ $$=$3; VARDTYPE($2); if (AstVar* vp=VARDONEP($$,$4,$5)) { $$->addNextNull(vp); vp->valuep($7); } }
+			{ $$=$3; VARDTYPE($2); if (AstVar* vp = VARDONEP($$, $4, $5)) { $$->addNextNull(vp); vp->valuep($7); } }
 	|	portDirNetE yVAR data_type      portSig variable_dimensionListE sigAttrListE '=' constExpr
-			{ $$=$4; VARDTYPE($3); if (AstVar* vp=VARDONEP($$,$5,$6)) { $$->addNextNull(vp); vp->valuep($8); } }
+			{ $$=$4; VARDTYPE($3); if (AstVar* vp = VARDONEP($$, $5, $6)) { $$->addNextNull(vp); vp->valuep($8); } }
 	|	portDirNetE yVAR implicit_typeE portSig variable_dimensionListE sigAttrListE '=' constExpr
-			{ $$=$4; VARDTYPE($3); if (AstVar* vp=VARDONEP($$,$5,$6)) { $$->addNextNull(vp); vp->valuep($8); } }
+			{ $$=$4; VARDTYPE($3); if (AstVar* vp = VARDONEP($$, $5, $6)) { $$->addNextNull(vp); vp->valuep($8); } }
 	|	portDirNetE /*implicit*/        portSig variable_dimensionListE sigAttrListE '=' constExpr
-			{ $$=$2; /*VARDTYPE-same*/ if (AstVar* vp=VARDONEP($$,$3,$4)) { $$->addNextNull(vp); vp->valuep($6); } }
+			{ $$=$2; /*VARDTYPE-same*/ if (AstVar* vp = VARDONEP($$, $3, $4)) { $$->addNextNull(vp); vp->valuep($6); } }
 	;
 
 portDirNetE:			// IEEE: part of port, optional net type and/or direction
@@ -1729,11 +1729,11 @@ varParamReset:
 port_direction:			// ==IEEE: port_direction + tf_port_direction
 	//			// IEEE 19.8 just "input" FIRST forces type to wire - we'll ignore that here
 	//			// Only used for ANSI declarations
-		yINPUT					{ GRAMMARP->m_pinAnsi=true; VARIO(INPUT); }
-	|	yOUTPUT					{ GRAMMARP->m_pinAnsi=true; VARIO(OUTPUT); }
-	|	yINOUT					{ GRAMMARP->m_pinAnsi=true; VARIO(INOUT); }
-	|	yREF					{ GRAMMARP->m_pinAnsi=true; VARIO(REF); }
-	|	yCONST__REF yREF			{ GRAMMARP->m_pinAnsi=true; VARIO(CONSTREF); }
+		yINPUT					{ GRAMMARP->m_pinAnsi = true; VARIO(INPUT); }
+	|	yOUTPUT					{ GRAMMARP->m_pinAnsi = true; VARIO(OUTPUT); }
+	|	yINOUT					{ GRAMMARP->m_pinAnsi = true; VARIO(INOUT); }
+	|	yREF					{ GRAMMARP->m_pinAnsi = true; VARIO(REF); }
+	|	yCONST__REF yREF			{ GRAMMARP->m_pinAnsi = true; VARIO(CONSTREF); }
 	;
 
 port_directionReset:		// IEEE: port_direction that starts a port_declaraiton
@@ -1769,7 +1769,7 @@ port_declaration<nodep>:	// ==IEEE: port_declaration
 	/*mid*/		{ VARDTYPE_NDECL(new AstBasicDType($<fl>3, LOGIC_IMPLICIT, $3)); }
 	/*cont*/    list_of_variable_decl_assignments			{ $$ = $5; }
 	|	port_directionReset port_declNetE /*implicit*/
-	/*mid*/		{ VARDTYPE_NDECL(nullptr);/*default_nettype*/}
+	/*mid*/		{ VARDTYPE_NDECL(nullptr); /*default_nettype*/ }
 	/*cont*/    list_of_variable_decl_assignments			{ $$ = $4; }
 	//			// IEEE: interface_declaration
 	//			// Looks just like variable declaration unless has a period
@@ -1908,11 +1908,11 @@ struct_unionDecl<uorstructp>:	// IEEE: part of data_type
 		ySTRUCT        packedSigningE '{'
 	/*mid*/ 	{ $<uorstructp>$ = new AstStructDType($1, $2); SYMP->pushNew($<uorstructp>$); }
 	/*cont*/    struct_union_memberList '}'
-			{ $$=$<uorstructp>4; $$->addMembersp($5); SYMP->popScope($$); }
+			{ $$ = $<uorstructp>4; $$->addMembersp($5); SYMP->popScope($$); }
 	|	yUNION taggedE packedSigningE '{'
 	/*mid*/		{ $<uorstructp>$ = new AstUnionDType($1, $3); SYMP->pushNew($<uorstructp>$); }
 	/*cont*/    struct_union_memberList '}'
-			{ $$=$<uorstructp>5; $$->addMembersp($6); SYMP->popScope($$); }
+			{ $$ = $<uorstructp>5; $$->addMembersp($6); SYMP->popScope($$); }
 	;
 
 struct_union_memberList<nodep>:	// IEEE: { struct_union_member }
@@ -2555,8 +2555,8 @@ case_generate_itemListE<nodep>:	// IEEE: [{ case_generate_itemList }]
 	;
 
 case_generate_itemList<nodep>:	// IEEE: { case_generate_itemList }
-		~c~case_generate_item			{ $$=$1; }
-	|	~c~case_generate_itemList ~c~case_generate_item	{ $$=$1; $1->addNext($2); }
+		~c~case_generate_item			{ $$ = $1; }
+	|	~c~case_generate_itemList ~c~case_generate_item		{ $$ = $1; $1->addNext($2); }
 	;
 
 //UNSUPc_case_generate_itemList<nodep>:  // IEEE: { case_generate_item } (for checkers)
@@ -2564,9 +2564,9 @@ case_generate_itemList<nodep>:	// IEEE: { case_generate_itemList }
 //UNSUP	;
 
 case_generate_item<nodep>:	// ==IEEE: case_generate_item
-		caseCondList colon generate_block_or_null		{ $$ = new AstCaseItem($2,$1,$3); }
-	|	yDEFAULT colon generate_block_or_null		{ $$ = new AstCaseItem($1,nullptr,$3); }
-	|	yDEFAULT generate_block_or_null			{ $$ = new AstCaseItem($1,nullptr,$2); }
+		caseCondList colon generate_block_or_null	{ $$ = new AstCaseItem{$2, $1, $3}; }
+	|	yDEFAULT colon generate_block_or_null		{ $$ = new AstCaseItem{$1, nullptr, $3}; }
+	|	yDEFAULT generate_block_or_null			{ $$ = new AstCaseItem{$1, nullptr, $2}; }
 	;
 
 //UNSUPc_case_generate_item<nodep>:  // IEEE: case_generate_item (for checkers)
@@ -2640,8 +2640,8 @@ netSig<varp>:			// IEEE: net_decl_assignment -  one element from list_of_port_id
 	;
 
 netId<strp>:
-		id/*new-net*/				{ $$ = $1; $<fl>$=$<fl>1; }
-	|	idSVKwd					{ $$ = $1; $<fl>$=$<fl>1; }
+		id/*new-net*/				{ $$ = $1; $<fl>$ = $<fl>1; }
+	|	idSVKwd					{ $$ = $1; $<fl>$ = $<fl>1; }
 	;
 
 sigAttrListE<nodep>:
@@ -2682,7 +2682,7 @@ rangeList<rangep>:		// IEEE: {packed_dimension}
 
 //UNSUPbit_selectE<fl>:  // IEEE: constant_bit_select (IEEE included empty)
 //UNSUP		/* empty */				{ $$ = nullptr; }
-//UNSUP	|	'[' constExpr ']'			{ $<fl>$=$<fl>1; $$ = "["+$2+"]"; }
+//UNSUP	|	'[' constExpr ']'			{ $<fl>$ = $<fl>1; $$ = "[" + $2 + "]"; }
 //UNSUP	;
 
 // IEEE: select
@@ -2858,10 +2858,10 @@ cellparamItemE<pinp>:		// IEEE: named_parameter_assignment + empty
 	|	yP_DOTSTAR				{ $$ = new AstPin($1,PINNUMINC(),".*",nullptr); }
 	|	'.' idSVKwd				{ $$ = new AstPin($<fl>2,PINNUMINC(), *$2,
 									  new AstParseRef($<fl>2,VParseRefExp::PX_TEXT,*$2,nullptr,nullptr));
-									  $$->svImplicit(true);}
+									  $$->svImplicit(true); }
 	|	'.' idAny				{ $$ = new AstPin($<fl>2,PINNUMINC(), *$2,
 									  new AstParseRef($<fl>2,VParseRefExp::PX_TEXT,*$2,nullptr,nullptr));
-									  $$->svImplicit(true);}
+									  $$->svImplicit(true); }
 	|	'.' idAny '(' ')'			{ $$ = new AstPin($<fl>2,PINNUMINC(),*$2,nullptr); }
 	//			// mintypmax is expanded here, as it might be a UDP or gate primitive
 	//			// data_type for 'parameter type' hookups
@@ -3064,7 +3064,7 @@ block_item_declaration<nodep>:	// ==IEEE: block_item_declaration
 
 stmtList<nodep>:
 		stmtBlock				{ $$ = $1; }
-	|	stmtList stmtBlock			{ $$ = ($2==nullptr)?($1):($1->addNext($2)); }
+	|	stmtList stmtBlock			{ $$ = $2 ? $1->addNext($2) : $1; }
 	;
 
 stmt<nodep>:			// IEEE: statement_or_null == function_statement_or_null
@@ -3179,8 +3179,8 @@ statement_item<nodep>:		// IEEE: statement_item
 	//
 	//			// IEEE: loop_statement
 	|	yFOREVER stmtBlock			{ $$ = new AstWhile($1,new AstConst($1, AstConst::BitTrue()), $2); }
-	|	yREPEAT '(' expr ')' stmtBlock		{ $$ = new AstRepeat($1,$3,$5);}
-	|	yWHILE '(' expr ')' stmtBlock		{ $$ = new AstWhile($1,$3,$5);}
+	|	yREPEAT '(' expr ')' stmtBlock		{ $$ = new AstRepeat{$1, $3, $5}; }
+	|	yWHILE '(' expr ')' stmtBlock		{ $$ = new AstWhile{$1, $3, $5}; }
 	//			// for's first ';' is in for_initialization
 	|	statementFor				{ $$ = $1; }
 	|	yDO stmtBlock yWHILE '(' expr ')' ';'	{ if ($2) {
@@ -3283,11 +3283,15 @@ foperator_assignment<nodep>:	// IEEE: operator_assignment (for first part of exp
 
 inc_or_dec_expression<nodep>:	// ==IEEE: inc_or_dec_expression
 	//			// Need fexprScope instead of variable_lvalue to prevent conflict
-		~l~exprScope yP_PLUSPLUS		{ $<fl>$=$<fl>1; $$ = new AstPostAdd($2, new AstConst($2, AstConst::StringToParse(), "'b1"), $1, $1->cloneTree(true)); }
-	|	~l~exprScope yP_MINUSMINUS		{ $<fl>$=$<fl>1; $$ = new AstPostSub($2, new AstConst($2, AstConst::StringToParse(), "'b1"), $1, $1->cloneTree(true)); }
+		~l~exprScope yP_PLUSPLUS
+			{ $<fl>$ = $<fl>1; $$ = new AstPostAdd{$2, new AstConst{$2, AstConst::StringToParse(), "'b1"}, $1, $1->cloneTree(true)}; }
+	|	~l~exprScope yP_MINUSMINUS
+			{ $<fl>$ = $<fl>1; $$ = new AstPostSub{$2, new AstConst{$2, AstConst::StringToParse(), "'b1"}, $1, $1->cloneTree(true)}; }
 	//			// Need expr instead of variable_lvalue to prevent conflict
-	|	yP_PLUSPLUS	expr			{ $<fl>$=$<fl>1; $$ = new AstPreAdd($1, new AstConst($1, AstConst::StringToParse(), "'b1"), $2, $2->cloneTree(true)); }
-	|	yP_MINUSMINUS	expr			{ $<fl>$=$<fl>1; $$ = new AstPreSub($1, new AstConst($1, AstConst::StringToParse(), "'b1"), $2, $2->cloneTree(true)); }
+	|	yP_PLUSPLUS	expr
+			{ $<fl>$ = $<fl>1; $$ = new AstPreAdd{$1, new AstConst{$1, AstConst::StringToParse(), "'b1"}, $2, $2->cloneTree(true)}; }
+	|	yP_MINUSMINUS	expr
+			{ $<fl>$ = $<fl>1; $$ = new AstPreSub{$1, new AstConst{$1, AstConst::StringToParse(), "'b1"}, $2, $2->cloneTree(true)}; }
 	;
 
 finc_or_dec_expression<nodep>:	// ==IEEE: inc_or_dec_expression
@@ -3360,26 +3364,26 @@ case_insideListE<caseitemp>:	// IEEE: [ { case_inside_item } ]
 	;
 
 case_itemList<caseitemp>:	// IEEE: { case_item + ... }
-		caseCondList colon stmtBlock		{ $$ = new AstCaseItem($2,$1,$3); }
-	|	yDEFAULT colon stmtBlock			{ $$ = new AstCaseItem($1,nullptr,$3); }
-	|	yDEFAULT stmtBlock			{ $$ = new AstCaseItem($1,nullptr,$2); }
-	|	case_itemList caseCondList colon stmtBlock	{ $$ = $1;$1->addNext(new AstCaseItem($3,$2,$4)); }
-	|       case_itemList yDEFAULT stmtBlock		{ $$ = $1;$1->addNext(new AstCaseItem($2,nullptr,$3)); }
-	|	case_itemList yDEFAULT colon stmtBlock		{ $$ = $1;$1->addNext(new AstCaseItem($2,nullptr,$4)); }
+		caseCondList colon stmtBlock			{ $$ = new AstCaseItem{$2, $1, $3}; }
+	|	yDEFAULT colon stmtBlock			{ $$ = new AstCaseItem{$1, nullptr, $3}; }
+	|	yDEFAULT stmtBlock				{ $$ = new AstCaseItem{$1, nullptr, $2}; }
+	|	case_itemList caseCondList colon stmtBlock	{ $$ = $1; $1->addNext(new AstCaseItem{$3, $2, $4}); }
+	|       case_itemList yDEFAULT stmtBlock		{ $$ = $1; $1->addNext(new AstCaseItem{$2, nullptr, $3}); }
+	|	case_itemList yDEFAULT colon stmtBlock		{ $$ = $1; $1->addNext(new AstCaseItem{$2, nullptr, $4}); }
 	;
 
 case_inside_itemList<caseitemp>:	// IEEE: { case_inside_item + open_range_list ... }
-		open_range_list colon stmtBlock		{ $$ = new AstCaseItem($2,$1,$3); }
-	|	yDEFAULT colon stmtBlock			{ $$ = new AstCaseItem($1,nullptr,$3); }
-	|	yDEFAULT stmtBlock			{ $$ = new AstCaseItem($1,nullptr,$2); }
-	|	case_inside_itemList open_range_list colon stmtBlock { $$ = $1;$1->addNext(new AstCaseItem($3,$2,$4)); }
-	|       case_inside_itemList yDEFAULT stmtBlock		{ $$ = $1;$1->addNext(new AstCaseItem($2,nullptr,$3)); }
-	|	case_inside_itemList yDEFAULT colon stmtBlock	{ $$ = $1;$1->addNext(new AstCaseItem($2,nullptr,$4)); }
+		open_range_list colon stmtBlock			{ $$ = new AstCaseItem{$2, $1, $3}; }
+	|	yDEFAULT colon stmtBlock			{ $$ = new AstCaseItem{$1, nullptr, $3}; }
+	|	yDEFAULT stmtBlock				{ $$ = new AstCaseItem{$1, nullptr, $2}; }
+	|	case_inside_itemList open_range_list colon stmtBlock { $$ = $1; $1->addNext(new AstCaseItem{$3, $2, $4}); }
+	|       case_inside_itemList yDEFAULT stmtBlock		{ $$ = $1; $1->addNext(new AstCaseItem{$2, nullptr, $3}); }
+	|	case_inside_itemList yDEFAULT colon stmtBlock	{ $$ = $1; $1->addNext(new AstCaseItem{$2, nullptr, $4}); }
 	;
 
 open_range_list<nodep>:		// ==IEEE: open_range_list + open_value_range
 		open_value_range			{ $$ = $1; }
-	|	open_range_list ',' open_value_range	{ $$ = $1;$1->addNext($3); }
+	|	open_range_list ',' open_value_range	{ $$ = $1; $1->addNext($3); }
 	;
 
 open_value_range<nodep>:	// ==IEEE: open_value_range
@@ -3398,7 +3402,7 @@ value_range<nodep>:		// ==IEEE: value_range
 
 caseCondList<nodep>:		// IEEE: part of case_item
 		expr 					{ $$ = $1; }
-	|	caseCondList ',' expr			{ $$ = $1;$1->addNext($3); }
+	|	caseCondList ',' expr			{ $$ = $1; $1->addNext($3); }
 	;
 
 patternNoExpr<nodep>:		// IEEE: pattern **Excluding Expr*
@@ -3419,8 +3423,9 @@ patternList<nodep>:		// IEEE: part of pattern
 	;
 
 patternOne<nodep>:		// IEEE: part of pattern
-		expr					{ if ($1) { $$ = new AstPatMember($1->fileline(),$1,nullptr,nullptr); } else { $$=nullptr; } }
-	|	expr '{' argsExprList '}'		{ $$ = new AstPatMember($2,$3,nullptr,$1); }
+		expr
+			{ if ($1) $$ = new AstPatMember{$1->fileline(), $1, nullptr, nullptr}; else $$ = nullptr; }
+	|	expr '{' argsExprList '}'		{ $$ = new AstPatMember{$2, $3, nullptr, $1}; }
 	|	patternNoExpr				{ $$ = $1; }
 	;
 
@@ -3526,7 +3531,7 @@ for_step_assignment<nodep>:  // ==IEEE: for_step_assignment
 
 loop_variables<nodep>:		// IEEE: loop_variables
 		varRefBase				{ $$ = $1; }
-	|	loop_variables ',' varRefBase		{ $$ = $1;$1->addNext($3); }
+	|	loop_variables ',' varRefBase		{ $$ = $1; $1->addNext($3); }
 	;
 
 //************************************************
@@ -3900,8 +3905,10 @@ task_declaration<ftaskp>:	// ==IEEE: task_declaration
 	;
 
 task_prototype<ftaskp>:		// ==IEEE: task_prototype
-		yTASK taskId '(' tf_port_listE ')'	{ $$=$2; $$->addStmtsp($4); $$->prototype(true); SYMP->popScope($$); }
-	|	yTASK taskId				{ $$=$2; $$->prototype(true); SYMP->popScope($$); }
+		yTASK taskId '(' tf_port_listE ')'
+			{ $$ = $2; $$->addStmtsp($4); $$->prototype(true); SYMP->popScope($$); }
+	|	yTASK taskId
+			{ $$ = $2; $$->prototype(true); SYMP->popScope($$); }
 	;
 
 function_declaration<ftaskp>:	// IEEE: function_declaration + function_body_declaration
@@ -3918,13 +3925,17 @@ function_declaration<ftaskp>:	// IEEE: function_declaration + function_body_decl
 	;
 
 function_prototype<ftaskp>:	// IEEE: function_prototype
-		yFUNCTION funcId '(' tf_port_listE ')'	{ $$=$2; $$->addStmtsp($4); $$->prototype(true); SYMP->popScope($$); }
-	|	yFUNCTION funcId			{ $$=$2; $$->prototype(true); SYMP->popScope($$); }
+		yFUNCTION funcId '(' tf_port_listE ')'
+			{ $$ = $2; $$->addStmtsp($4); $$->prototype(true); SYMP->popScope($$); }
+	|	yFUNCTION funcId
+			{ $$ = $2; $$->prototype(true); SYMP->popScope($$); }
 	;
 
 class_constructor_prototype<ftaskp>:	// ==IEEE: class_constructor_prototype
-		yFUNCTION funcIdNew '(' tf_port_listE ')' ';'	{ $$ = $2; $$->addStmtsp($4); $$->prototype(true); SYMP->popScope($$); }
-	|	yFUNCTION funcIdNew ';'				{ $$ = $2; $$->prototype(true); SYMP->popScope($$); }
+		yFUNCTION funcIdNew '(' tf_port_listE ')' ';'
+			{ $$ = $2; $$->addStmtsp($4); $$->prototype(true); SYMP->popScope($$); }
+	|	yFUNCTION funcIdNew ';'
+			{ $$ = $2; $$->prototype(true); SYMP->popScope($$); }
 	;
 
 funcIsolateE<cint>:
@@ -4145,7 +4156,7 @@ dpi_import_export<nodep>:	// ==IEEE: dpi_import_export
 
 dpi_importLabelE<strp>:		// IEEE: part of dpi_import_export
 		/* empty */				{ static string s; $$ = &s; }
-	|	idAny/*c_identifier*/ '='		{ $$ = $1; $<fl>$=$<fl>1; }
+	|	idAny/*c_identifier*/ '='		{ $$ = $1; $<fl>$ = $<fl>1; }
 	;
 
 dpi_tf_import_propertyE<iprop>:	// IEEE: [ dpi_function_import_property + dpi_task_import_property ]
@@ -4197,7 +4208,7 @@ expr<nodep>:			// IEEE: part of expression/constant_expression/primary
 	|	yP_XNOR ~r~expr	%prec prREDUCTION	{ $$ = new AstLogNot($1, new AstRedXor($1, $2)); }
 	//
 	//			// IEEE: inc_or_dec_expression
-	|	~l~inc_or_dec_expression		{ $<fl>$=$<fl>1; $$ = $1; }
+	|	~l~inc_or_dec_expression		{ $<fl>$ = $<fl>1; $$ = $1; }
 	//
 	//			// IEEE: '(' operator_assignment ')'
 	//			// Need exprScope of variable_lvalue to prevent conflict
@@ -4247,7 +4258,7 @@ expr<nodep>:			// IEEE: part of expression/constant_expression/primary
 	//			// Conflicts with constraint_expression:"expr yP_MINUSGT constraint_set"
 	//			// To duplicating expr for constraints, just allow the more general form
 	//			// Later Ast processing must ignore constraint terms where inappropriate
-	//UNSUP	~l~expr yP_MINUSGT constraint_set		{ $<fl>$=$<fl>1; $$ = $1+$2+$3; }
+	//UNSUP	~l~expr yP_MINUSGT constraint_set		{ $<fl>$ = $<fl>1; $$ = $1 + $2 + $3; }
 	//UNSUP remove line below
 	|	~l~expr yP_MINUSGT ~r~expr		{ $$ = new AstLogIf($2, $1, $3); }
 	//
@@ -4376,10 +4387,10 @@ fexpr<nodep>:			// For use as first part of statement (disambiguates <=)
 //UNSUP	//			// IEEE: '(' event_expression ')'
 //UNSUP	//			// expr:'(' x ')' conflicts with event_expression:'(' event_expression ')'
 //UNSUP	//			// so we use a special expression class
-//UNSUP	|	'(' event_expression ')'		{ $<fl>$=$<fl>1; $$ = "(...)"; }
+//UNSUP	|	'(' event_expression ')'		{ $<fl>$ = $<fl>1; $$ = "(...)"; }
 //UNSUP	//			// IEEE: From normal expr: '(' expr ':' expr ':' expr ')'
 //UNSUP	//			// But must avoid conflict
-//UNSUP	|	'(' event_expression ':' expr ':' expr ')'	{ $<fl>$=$<fl>1; $$ = "(...)"; }
+//UNSUP	|	'(' event_expression ':' expr ':' expr ')'	{ $<fl>$ = $<fl>1; $$ = "(...)"; }
 //UNSUP	;
 
 exprNoStr<nodep>:		// expression with string removed
@@ -4429,7 +4440,7 @@ fexprOkLvalue<nodep>:		// exprOkLValue, For use as first part of statement (disa
 //UNSUP	;
 
 fexprLvalue<nodep>:		// For use as first part of statement (disambiguates <=)
-		fexprOkLvalue				{ $<fl>$=$<fl>1; $$ = $1; }
+		fexprOkLvalue				{ $<fl>$ = $<fl>1; $$ = $1; }
 	;
 
 exprScope<nodep>:		// scope and variable for use to inside an expression
@@ -4480,7 +4491,7 @@ exprStrText<nodep>:
 
 cStrList<nodep>:
 		exprStrText				{ $$ = $1; }
-	|	exprStrText ',' cStrList		{ $$ = $1;$1->addNext($3); }
+	|	exprStrText ',' cStrList		{ $$ = $1; $1->addNext($3); }
 	;
 
 cateList<nodep>:
@@ -4496,7 +4507,7 @@ exprListE<nodep>:
 
 exprList<nodep>:
 		expr					{ $$ = $1; }
-	|	exprList ',' expr			{ $$ = $1;$1->addNext($3); }
+	|	exprList ',' expr			{ $$ = $1; $1->addNext($3); }
 	;
 
 exprDispList<nodep>:		// exprList for within $display
@@ -4509,7 +4520,7 @@ exprDispList<nodep>:		// exprList for within $display
 
 vrdList<nodep>:
 		idClassSel				{ $$ = $1; }
-	|	vrdList ',' idClassSel			{ $$ = $1;$1->addNext($3); }
+	|	vrdList ',' idClassSel			{ $$ = $1; $1->addNext($3); }
 	;
 
 commaVRDListE<nodep>:
@@ -4860,24 +4871,24 @@ junkToSemi:
 // IDs
 
 id<strp>:
-		yaID__ETC				{ $$ = $1; $<fl>$=$<fl>1; }
-	|	idRandomize				{ $$ = $1; $<fl>$=$<fl>1; }
+		yaID__ETC				{ $$ = $1; $<fl>$ = $<fl>1; }
+	|	idRandomize				{ $$ = $1; $<fl>$ = $<fl>1; }
 	;
 
 idAny<strp>:			// Any kind of identifier
-		yaID__ETC				{ $$ = $1; $<fl>$=$<fl>1; }
-	|	yaID__aTYPE				{ $$ = $1; $<fl>$=$<fl>1; }
-	|	idRandomize				{ $$ = $1; $<fl>$=$<fl>1; }
+		yaID__ETC				{ $$ = $1; $<fl>$ = $<fl>1; }
+	|	yaID__aTYPE				{ $$ = $1; $<fl>$ = $<fl>1; }
+	|	idRandomize				{ $$ = $1; $<fl>$ = $<fl>1; }
 	;
 
 idType<strp>:			// IEEE: class_identifier or other type identifier
 	//			// Used where reference is needed
-		yaID__aTYPE				{ $$ = $1; $<fl>$=$<fl>1; }
+		yaID__aTYPE				{ $$ = $1; $<fl>$ = $<fl>1; }
 	;
 
 idCC<strp>:			// IEEE: class/package then ::
 				// lexer matches this:  yaID_LEX [ '#' '(' ... ')' ] yP_COLONCOLON
-		yaID__CC				{ $$ = $1; $<fl>$=$<fl>1; }
+		yaID__CC				{ $$ = $1; $<fl>$ = $<fl>1; }
 	;
 
 idRandomize<strp>:		// Keyword as an identifier
@@ -4886,8 +4897,10 @@ idRandomize<strp>:		// Keyword as an identifier
 
 idSVKwd<strp>:			// Warn about non-forward compatible Verilog 2001 code
 	//			// yBIT, yBYTE won't work here as causes conflicts
-		yDO					{ static string s = "do"   ; $$ = &s; ERRSVKWD($1,*$$); $<fl>$=$<fl>1; }
-	|	yFINAL					{ static string s = "final"; $$ = &s; ERRSVKWD($1,*$$); $<fl>$=$<fl>1; }
+		yDO
+			{ static string s = "do"   ; $$ = &s; ERRSVKWD($1,*$$); $<fl>$ = $<fl>1; }
+	|	yFINAL
+			{ static string s = "final"; $$ = &s; ERRSVKWD($1,*$$); $<fl>$ = $<fl>1; }
 	;
 
 variable_lvalue<nodep>:		// IEEE: variable_lvalue or net_lvalue
@@ -5001,7 +5014,8 @@ str<strp>:			// yaSTRING but with \{escapes} need decoded
 	;
 
 strAsInt<nodep>:
-		yaSTRING				{ $$ = new AstConst($<fl>1, AstConst::VerilogStringLiteral(), GRAMMARP->deQuote($<fl>1, *$1));}
+		yaSTRING
+			{ $$ = new AstConst{$<fl>1, AstConst::VerilogStringLiteral(), GRAMMARP->deQuote($<fl>1, *$1)}; }
 	;
 
 strAsIntIgnore<nodep>:		// strAsInt, but never matches for when expr shouldn't parse strings
@@ -5009,13 +5023,13 @@ strAsIntIgnore<nodep>:		// strAsInt, but never matches for when expr shouldn't p
 	;
 
 strAsText<nodep>:
-		yaSTRING				{ $$ = GRAMMARP->createTextQuoted($<fl>1,*$1);}
+		yaSTRING				{ $$ = GRAMMARP->createTextQuoted($<fl>1, *$1); }
 	;
 
 endLabelE<strp>:
-		/* empty */				{ $$ = nullptr; $<fl>$=nullptr; }
-	|	':' idAny				{ $$ = $2; $<fl>$=$<fl>2; }
-	|	':' yNEW__ETC				{ static string n = "new"; $$ = &n; $<fl>$=$<fl>2; }
+		/* empty */				{ $$ = nullptr; $<fl>$ = nullptr; }
+	|	':' idAny				{ $$ = $2; $<fl>$ = $<fl>2; }
+	|	':' yNEW__ETC				{ static string n = "new"; $$ = &n; $<fl>$ = $<fl>2; }
 	;
 
 //************************************************
@@ -5083,7 +5097,7 @@ clocking_declaration<nodep>:		// IEEE: clocking_declaration  (INCOMPLETE)
 //UNSUP	;
 
 //UNSUPclocking_skewE:  // IEEE: [clocking_skew]
-//UNSUP		/* empty */				{ $$ = nullptr;}
+//UNSUP		/* empty */				{ $$ = nullptr; }
 //UNSUP	|	clocking_skew				{ $$ = $1; }
 //UNSUP	;
 
@@ -5488,21 +5502,21 @@ pexpr<nodep>:  // IEEE: property_expr  (The name pexpr is important as regexps j
 //UNSUP	//			// As sequence_expr includes expression_or_dist, and boolean_abbrev includes sequence_abbrev:
 //UNSUP	//			// '(' sequence_expr {',' sequence_match_item } ')' [ boolean_abbrev ]
 //UNSUP	//			// "'(' sexpr ')' boolean_abbrev" matches "[sexpr:'(' expr ')'] boolean_abbrev" so we can simply drop it
-//UNSUP	|	'(' ~p~sexpr ')'			{ $<fl>$=$<fl>1; $$=$1+$2+$3; }
+//UNSUP	|	'(' ~p~sexpr ')'			{ $<fl>$ = $<fl>1; $$ = ...; }
 //UNSUP	|	'(' ~p~sexpr ',' sequence_match_itemList ')'	{ }
 //UNSUP	//
 //UNSUP	//			// AND/OR are between pexprs OR sexprs
-//UNSUP	|	~p~sexpr yAND ~p~sexpr			{ $<fl>$=$<fl>1; $$=$1+$2+$3; }
-//UNSUP	|	~p~sexpr yOR ~p~sexpr			{ $<fl>$=$<fl>1; $$=$1+$2+$3; }
+//UNSUP	|	~p~sexpr yAND ~p~sexpr			{ $<fl>$ = $<fl>1; $$ = ...; }
+//UNSUP	|	~p~sexpr yOR ~p~sexpr			{ $<fl>$ = $<fl>1; $$ = ...; }
 //UNSUP	//			// Intersect always has an sexpr rhs
-//UNSUP	|	~p~sexpr yINTERSECT sexpr		{ $<fl>$=$<fl>1; $$=$1+$2+$3; }
+//UNSUP	|	~p~sexpr yINTERSECT sexpr		{ $<fl>$ = $<fl>1; $$ = ...; }
 //UNSUP	//
 //UNSUP	|	yFIRST_MATCH '(' sexpr ')'		{ }
 //UNSUP	|	yFIRST_MATCH '(' sexpr ',' sequence_match_itemList ')'	{ }
 //UNSUP	|	~p~sexpr/*sexpression_or_dist*/ yTHROUGHOUT sexpr		{ }
 //UNSUP	//			// Below pexpr's are really sequence_expr, but avoid conflict
 //UNSUP	//			// IEEE: sexpr yWITHIN sexpr
-//UNSUP	|	~p~sexpr yWITHIN sexpr			{ $<fl>$=$<fl>1; $$=$1+$2+$3; }
+//UNSUP	|	~p~sexpr yWITHIN sexpr			{ $<fl>$ = $<fl>1; $$ = ...; }
 //UNSUP	//			// Note concurrent_assertion had duplicate rule for below
 //UNSUP	|	clocking_event ~p~sexpr %prec prSEQ_CLOCKING	{ }
 //UNSUP	//
@@ -6358,11 +6372,11 @@ vltItem:
 	|	vltOffFront yVLT_D_FILE yaSTRING yVLT_D_LINES yaINTNUM '-' yaINTNUM
 			{ V3Config::addIgnore($1, false, *$3, $5->toUInt(), $7->toUInt()+1); }
 	|	vltOffFront yVLT_D_FILE yaSTRING yVLT_D_MATCH yaSTRING
-			{	if (($1==V3ErrorCode::I_COVERAGE) || ($1==V3ErrorCode::I_TRACING)) {
-					$<fl>1->v3error("Argument -match only supported for lint_off");
-				} else {
-					V3Config::addWaiver($1,*$3,*$5);
-				}}
+			{ if (($1 == V3ErrorCode::I_COVERAGE) || ($1 == V3ErrorCode::I_TRACING)) {
+			      $<fl>1->v3error("Argument -match only supported for lint_off");
+			  } else {
+			      V3Config::addWaiver($1,*$3,*$5);
+			  }}
 	|	vltOnFront			{ V3Config::addIgnore($1, true, "*", 0, 0); }
 	|	vltOnFront yVLT_D_FILE yaSTRING
 			{ V3Config::addIgnore($1, true, *$3, 0, 0); }