diff --git a/Changes b/Changes index e88cee698..a7271be19 100644 --- a/Changes +++ b/Changes @@ -13,6 +13,8 @@ The contributors that suggested a given feature are shown in []. Thanks! **** Fix LDFLAGS and CFLAGS not preserving order, bug1130. [Olof Kindgren] +**** Fix internal error on initializing parameter array, bug1131. [Jie Xu] + * Verilator 3.900 2017-01-15 diff --git a/src/V3Width.cpp b/src/V3Width.cpp index 2696f2c81..4ec6f6a8e 100644 --- a/src/V3Width.cpp +++ b/src/V3Width.cpp @@ -1283,7 +1283,7 @@ private: AstNodeDType* vdtypep = m_vup->dtypep(); if (!vdtypep) nodep->v3fatalSrc("InitArray type not assigned by AstPattern/Var visitor"); nodep->dtypep(vdtypep); - if (AstNodeArrayDType* arrayp = vdtypep->castNodeArrayDType()) { + if (AstNodeArrayDType* arrayp = vdtypep->skipRefp()->castNodeArrayDType()) { userIterateChildren(nodep, WidthVP(arrayp->subDTypep(),BOTH).p()); } else { nodep->v3fatalSrc("InitArray on non-array"); diff --git a/test_regress/t/t_initarray_nonarray.pl b/test_regress/t/t_initarray_nonarray.pl new file mode 100755 index 000000000..385b6a57e --- /dev/null +++ b/test_regress/t/t_initarray_nonarray.pl @@ -0,0 +1,14 @@ +#!/usr/bin/perl +if (!$::Driver) { use FindBin; exec("$FindBin::Bin/bootstrap.pl", @ARGV, $0); die; } +# DESCRIPTION: Verilator: Verilog Test driver/expect definition +# +# Copyright 2003 by Wilson Snyder. This program is free software; you can +# redistribute it and/or modify it under the terms of either the GNU +# Lesser General Public License Version 3 or the Perl Artistic License +# Version 2.0. + +compile ( + ); + +ok(1); +1; diff --git a/test_regress/t/t_initarray_nonarray.v b/test_regress/t/t_initarray_nonarray.v new file mode 100644 index 000000000..b1a9f6c8a --- /dev/null +++ b/test_regress/t/t_initarray_nonarray.v @@ -0,0 +1,26 @@ +// DESCRIPTION: Verilator: Verilog Test module +// +// The code here is used to trigger Verilator internal error +// "InitArray on non-array" +// +// This file ONLY is placed into the Public Domain, for any use, +// without warranty, 2017 by Jie Xu. + +typedef logic [7:0] mask_t [7:0]; + +// parameter logic [7:0] IMP_MASK[7:0] = '{8'hE1, 8'h03, 8'h07, 8'h3F, 8'h33, 8'hC3, 8'hC3, 8'h37}; + +parameter mask_t IMP_MASK = '{8'hE1, 8'h03, 8'h07, 8'h3F, 8'h33, 8'hC3, 8'hC3, 8'h37}; + +module t (/*AUTOARG*/ + // Inputs + clk + ); + input clk; + + mask_t a; + //logic [7:0] a[7:0]; + + assign a = IMP_MASK; + +endmodule