Tests: Add $dist tests

This commit is contained in:
Wilson Snyder 2022-11-19 22:01:55 -05:00
parent 0af3efda5c
commit e266b2cb03
7 changed files with 219 additions and 1 deletions

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@ -9,7 +9,6 @@ if (!$::Driver) { use FindBin; exec("$FindBin::Bin/bootstrap.pl", @ARGV, $0); di
# SPDX-License-Identifier: LGPL-3.0-only OR Artistic-2.0
scenarios(simulator => 1);
$Self->{vcs} and unsupported("VCS unsupported");
compile(
v_flags2 => ['+define+T_PACKAGE_EXPORT',],

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@ -0,0 +1,43 @@
%Error: t/t_probdist.v:18:11: Unsupported or unknown PLI call: '$dist_chi_square'
18 | r = $dist_chi_square(seed, 5);
| ^~~~~~~~~~~~~~~~
%Error: t/t_probdist.v:22:25: Unsupported or unknown PLI call: '$dist_chi_square'
22 | repeat(20) sum += $dist_chi_square(seed, 5);
| ^~~~~~~~~~~~~~~~
%Error: t/t_probdist.v:26:11: Unsupported or unknown PLI call: '$dist_erlang'
26 | r = $dist_erlang(seed, 5, 10);
| ^~~~~~~~~~~~
%Error: t/t_probdist.v:30:25: Unsupported or unknown PLI call: '$dist_erlang'
30 | repeat(20) sum += $dist_erlang(seed, 5, 10);
| ^~~~~~~~~~~~
%Error: t/t_probdist.v:34:11: Unsupported or unknown PLI call: '$dist_exponential'
34 | r = $dist_exponential(seed, 5);
| ^~~~~~~~~~~~~~~~~
%Error: t/t_probdist.v:38:25: Unsupported or unknown PLI call: '$dist_exponential'
38 | repeat(20) sum += $dist_exponential(seed, 5);
| ^~~~~~~~~~~~~~~~~
%Error: t/t_probdist.v:42:11: Unsupported or unknown PLI call: '$dist_normal'
42 | r = $dist_normal(seed, 5, 10);
| ^~~~~~~~~~~~
%Error: t/t_probdist.v:46:25: Unsupported or unknown PLI call: '$dist_normal'
46 | repeat(20) sum += $dist_normal(seed, 5, 10);
| ^~~~~~~~~~~~
%Error: t/t_probdist.v:50:11: Unsupported or unknown PLI call: '$dist_poisson'
50 | r = $dist_poisson(seed, 5);
| ^~~~~~~~~~~~~
%Error: t/t_probdist.v:54:25: Unsupported or unknown PLI call: '$dist_poisson'
54 | repeat(20) sum += $dist_poisson(seed, 5);
| ^~~~~~~~~~~~~
%Error: t/t_probdist.v:58:11: Unsupported or unknown PLI call: '$dist_t'
58 | r = $dist_t(seed, 5);
| ^~~~~~~
%Error: t/t_probdist.v:62:25: Unsupported or unknown PLI call: '$dist_t'
62 | repeat(20) sum += $dist_t(seed, 5);
| ^~~~~~~
%Error: t/t_probdist.v:66:11: Unsupported or unknown PLI call: '$dist_uniform'
66 | r = $dist_uniform(seed, 5, 10);
| ^~~~~~~~~~~~~
%Error: t/t_probdist.v:70:25: Unsupported or unknown PLI call: '$dist_uniform'
70 | repeat(20) sum += $dist_uniform(seed, 5, 10);
| ^~~~~~~~~~~~~
%Error: Exiting due to

23
test_regress/t/t_probdist.pl Executable file
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@ -0,0 +1,23 @@
#!/usr/bin/env perl
if (!$::Driver) { use FindBin; exec("$FindBin::Bin/bootstrap.pl", @ARGV, $0); die; }
# DESCRIPTION: Verilator: Verilog Test driver/expect definition
#
# Copyright 2022 by Wilson Snyder. This program is free software; you
# can redistribute it and/or modify it under the terms of either the GNU
# Lesser General Public License Version 3 or the Perl Artistic License
# Version 2.0.
# SPDX-License-Identifier: LGPL-3.0-only OR Artistic-2.0
scenarios(simulator => 1);
compile(
fails => $Self->{vlt_all},
expect_filename => $Self->{golden_filename},
);
execute(
check_finished => 1,
) if !$Self->{vlt_all};
ok(1);
1;

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@ -0,0 +1,77 @@
// DESCRIPTION: Verilator: Verilog Test module
//
// This file ONLY is placed under the Creative Commons Public Domain, for
// any use, without warranty, 2022 by Wilson Snyder.
// SPDX-License-Identifier: CC0-1.0
`define checkd(gotv,expv) do if ((gotv) !== (expv)) begin $write("%%Error: %s:%0d: got=%0d exp=%0d\n", `__FILE__,`__LINE__, (gotv), (expv)); $stop; end while(0);
module t(/*AUTOARG*/);
integer seed;
integer r;
integer sum;
initial begin
// Illegal values
seed = 1234;
r = $dist_chi_square(seed, 5);
`checkd(seed, 923940542);
`checkd(r, 8);
sum = 1;
repeat(20) sum += $dist_chi_square(seed, 5);
`checkd(sum, 130);
seed = 1234;
r = $dist_erlang(seed, 5, 10);
`checkd(seed, 1025211431);
`checkd(r, 19);
sum = 1;
repeat(20) sum += $dist_erlang(seed, 5, 10);
`checkd(sum, 173);
seed = 1234;
r = $dist_exponential(seed, 5);
`checkd(seed, 85231147);
`checkd(r, 20);
sum = 1;
repeat(20) sum += $dist_exponential(seed, 5);
`checkd(sum, 104);
seed = 1234;
r = $dist_normal(seed, 5, 10);
`checkd(seed, -1570070672);
`checkd(r, 4);
sum = 1;
repeat(20) sum += $dist_normal(seed, 5, 10);
`checkd(sum, 114);
seed = 1234;
r = $dist_poisson(seed, 5);
`checkd(seed, 418012337);
`checkd(r, 2);
sum = 1;
repeat(20) sum += $dist_poisson(seed, 5);
`checkd(sum, 111);
seed = 1234;
r = $dist_t(seed, 5);
`checkd(seed, -797481412);
`checkd(r, 0);
sum = 1;
repeat(20) sum += $dist_t(seed, 5);
`checkd(sum, -2);
seed = 1234;
r = $dist_uniform(seed, 5, 10);
`checkd(seed, 85231147);
`checkd(r, 5);
sum = 1;
repeat(20) sum += $dist_uniform(seed, 5, 10);
`checkd(sum, 147);
$write("*-* All Finished *-*\n");
$finish;
end
endmodule

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@ -0,0 +1,19 @@
%Error: t/t_probdist_bad.v:16:11: Unsupported or unknown PLI call: '$dist_chi_square'
16 | r = $dist_chi_square(seed, 0);
| ^~~~~~~~~~~~~~~~
%Error: t/t_probdist_bad.v:18:11: Unsupported or unknown PLI call: '$dist_erlang'
18 | r = $dist_erlang(seed, 0, 0);
| ^~~~~~~~~~~~
%Error: t/t_probdist_bad.v:20:11: Unsupported or unknown PLI call: '$dist_exponential'
20 | r = $dist_exponential(seed, 0);
| ^~~~~~~~~~~~~~~~~
%Error: t/t_probdist_bad.v:23:11: Unsupported or unknown PLI call: '$dist_poisson'
23 | r = $dist_poisson(seed, 0);
| ^~~~~~~~~~~~~
%Error: t/t_probdist_bad.v:25:11: Unsupported or unknown PLI call: '$dist_t'
25 | r = $dist_t(seed, 0);
| ^~~~~~~
%Error: t/t_probdist_bad.v:27:11: Unsupported or unknown PLI call: '$dist_uniform'
27 | r = $dist_uniform(seed, 10, 0);
| ^~~~~~~~~~~~~
%Error: Exiting due to

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@ -0,0 +1,23 @@
#!/usr/bin/env perl
if (!$::Driver) { use FindBin; exec("$FindBin::Bin/bootstrap.pl", @ARGV, $0); die; }
# DESCRIPTION: Verilator: Verilog Test driver/expect definition
#
# Copyright 2022 by Wilson Snyder. This program is free software; you
# can redistribute it and/or modify it under the terms of either the GNU
# Lesser General Public License Version 3 or the Perl Artistic License
# Version 2.0.
# SPDX-License-Identifier: LGPL-3.0-only OR Artistic-2.0
scenarios(simulator => 1);
compile(
fails => $Self->{vlt_all},
expect_filename => $Self->{golden_filename},
);
execute(
check_finished => 1,
) if !$Self->{vlt_all};
ok(1);
1;

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@ -0,0 +1,34 @@
// DESCRIPTION: Verilator: Verilog Test module
//
// This file ONLY is placed under the Creative Commons Public Domain, for
// any use, without warranty, 2022 by Wilson Snyder.
// SPDX-License-Identifier: CC0-1.0
`define checkd(gotv,expv) do if ((gotv) !== (expv)) begin $write("%%Error: %s:%0d: got=%0d exp=%0d\n", `__FILE__,`__LINE__, (gotv), (expv)); $stop; end while(0);
module t(/*AUTOARG*/);
integer seed;
integer r;
initial begin
// Illegal values
r = $dist_chi_square(seed, 0);
if (r != 0 && !$isunknown(r)) $stop;
r = $dist_erlang(seed, 0, 0);
if (r != 0 && !$isunknown(r)) $stop;
r = $dist_exponential(seed, 0);
if (r != 0 && !$isunknown(r)) $stop;
// r =$dist_exponential(seed, mean); // Always valid
r = $dist_poisson(seed, 0);
if (r != 0 && !$isunknown(r)) $stop;
r = $dist_t(seed, 0);
if (r != 0 && !$isunknown(r)) $stop;
r = $dist_uniform(seed, 10, 0);
if (r != 10 && !$isunknown(r)) $stop;
$write("*-* All Finished *-*\n");
$finish;
end
endmodule