forked from github/verilator
Tests
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@ -30,8 +30,10 @@ module t (/*AUTOARG*/);
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// Declarations using var
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var byte v_b;
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`ifndef VCS
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var [2:0] v_b3;
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var signed [2:0] v_bs;
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`endif
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// verilator lint_off WIDTH
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localparam p_implicit = {96{1'b1}};
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@ -52,6 +54,19 @@ module t (/*AUTOARG*/);
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localparam logic [1:0] p_logic2= {96{1'b1}};
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// verilator lint_on WIDTH
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byte v_byte[2];
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shortint v_shortint[2];
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int v_int[2];
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longint v_longint[2];
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integer v_integer[2];
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time v_time[2];
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chandle v_chandle[2];
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bit v_bit[2];
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logic v_logic[2];
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reg v_reg[2];
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real v_real[2];
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realtime v_realtime[2];
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// We do this in two steps so we can check that initialization inside functions works properly
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// verilator lint_off WIDTH
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function f_implicit; reg lv_implicit; f_implicit = lv_implicit; endfunction
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@ -148,6 +163,22 @@ module t (/*AUTOARG*/);
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`CHECK_P(p_logic2 ,2 );
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`CHECK_P(p_reg2 ,2 );
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`define CHECK_B(varname,nbits) \
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if ($bits(varname) !== nbits) begin $display("%%Error: Bad size for %s",`"varname`"); $stop; end \
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`CHECK_B(v_byte[1] ,8 );
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`CHECK_B(v_shortint[1] ,16);
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`CHECK_B(v_int[1] ,32);
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`CHECK_B(v_longint[1] ,64);
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`CHECK_B(v_integer[1] ,32);
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`CHECK_B(v_time[1] ,64);
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//`CHECK_B(v_chandle[1]
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`CHECK_B(v_bit[1] ,1 );
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`CHECK_B(v_logic[1] ,1 );
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`CHECK_B(v_reg[1] ,1 );
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//`CHECK_B(v_real[1] ,64); // $bits not allowed
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//`CHECK_B(v_realtime[1] ,64); // $bits not allowed
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`define CHECK_F(fname,nbits,zeroinit) \
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if ($bits(fname()) !== nbits) begin $display("%%Error: Bad size for %s",`"fname`"); $stop; end \
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