Fix parameter function string returns, bug1441.

Changes

@@ -14,6 +14,8 @@ The contributors that suggested a given feature are shown in []. Thanks!
 
 ****  Fix fault on $realtime with %t, bug1443. [Julien Margetts]
 
+****  Fix parameter function string returns, bug1441. [Denis Rystsov]
+
 
 * Verilator 4.014 2019-05-08
 

src/V3Number.cpp

@@ -1674,8 +1674,12 @@ V3Number& V3Number::opBufIf1(const V3Number& ens, const V3Number& if1s) {
 V3Number& V3Number::opAssign(const V3Number& lhs) {
     // Note may be a width change during the assign
     setZero();
-    for(int bit=0; bit<this->width(); bit++) {
+    if (isString()) {
-	setBit(bit,lhs.bitIs(bit));
+        m_stringVal = lhs.m_stringVal;
+    } else {
+        for (int bit=0; bit < this->width(); bit++) {
+            setBit(bit, lhs.bitIs(bit));
+        }
     }
     return *this;
 }

src/V3Simulate.h

@@ -220,8 +220,9 @@ private:
             nump = new V3Number(nodep, nodep->width(), value);
 	    m_numAllps.push_back(nump);
 	}
-	nump->isDouble(nodep->isDouble());
+        nump->isDouble(nodep->isDouble());
-	return nump;
+        nump->isString(nodep->isString());
+        return nump;
     }
 public:
     V3Number* newNumber(AstNode* nodep, uint32_t value=0) {

test_regress/t/t_display_string.out

@@ -0,0 +1,5 @@
+String: '          1'
+s f(1): '          1'
+s parm: '          1'
+s strg: '          1'
+*-* All Finished *-*

test_regress/t/t_display_string.pl

@@ -0,0 +1,20 @@
+#!/usr/bin/perl
+if (!$::Driver) { use FindBin; exec("$FindBin::Bin/bootstrap.pl", @ARGV, $0); die; }
+# DESCRIPTION: Verilator: Verilog Test driver/expect definition
+#
+# Copyright 2003 by Wilson Snyder. This program is free software; you can
+# redistribute it and/or modify it under the terms of either the GNU
+# Lesser General Public License Version 3 or the Perl Artistic License
+# Version 2.0.
+
+scenarios(simulator => 1);
+
+compile(
+    );
+
+execute(
+    expect_filename => $Self->{golden_filename},
+    );
+
+ok(1);
+1;

test_regress/t/t_display_string.v

@@ -0,0 +1,21 @@
+// DESCRIPTION: Verilator: Verilog Test module
+//
+// This file ONLY is placed into the Public Domain, for any use,
+// without warranty, 2003 by Wilson Snyder.
+
+module t;
+   function automatic string foo(int i);
+      return $sformatf("'%d'", i);  // %0d does not work here
+   endfunction
+   string bar = foo(1);
+   localparam string pbar = foo(1);
+   initial begin
+      $write("String: "); $display("'          1'");
+      //$write("foo(1): "); $display(foo(1));
+      $write("s f(1): "); $display("%s", foo(1));
+      $write("s parm: "); $display("%s", pbar);
+      $write("s strg: "); $display("%s", bar);
+      $write("*-* All Finished *-*\n");
+      $finish;
+   end
+endmodule