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Support assignment patterns as children of pins (#3041)

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Signed-off-by: Krzysztof Bieganski <kbieganski@antmicro.com>
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Krzysztof Bieganski 2021-08-30 16:44:03 +02:00 committed by GitHub
parent f64d9d87f6
commit cd9e9da4b5
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3 changed files with 70 additions and 0 deletions
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3
src/V3Width.cpp
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@ -4152,6 +4152,9 @@ private:
// TOP LEVEL NODE
if (nodep->modVarp() && nodep->modVarp()->isGParam()) {
// Widthing handled as special init() case
if (auto* patternp = VN_CAST(nodep->exprp(), Pattern))
if (auto* modVarp = nodep->modVarp())
patternp->childDTypep(modVarp->childDTypep()->cloneTree(false));
userIterateChildren(nodep, WidthVP(SELF, BOTH).p());
} else if (!m_paramsOnly) {
if (!nodep->modVarp()->didWidth()) {

22
test_regress/t/t_param_pattern.pl Executable file
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@ -0,0 +1,22 @@
#!/usr/bin/env perl
if (!$::Driver) { use FindBin; exec("$FindBin::Bin/bootstrap.pl", @ARGV, $0); die; }
# DESCRIPTION: Verilator: Verilog Test driver/expect definition
#
# Copyright 2003 by Wilson Snyder. This program is free software; you
# can redistribute it and/or modify it under the terms of either the GNU
# Lesser General Public License Version 3 or the Perl Artistic License
# Version 2.0.
# SPDX-License-Identifier: LGPL-3.0-only OR Artistic-2.0
scenarios(simulator => 1);
compile(
verilator_flags2 => ['--dump-tree']
);
execute(
check_finished => 1,
);
ok(1);
1;

45
test_regress/t/t_param_pattern.v Normal file
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@ -0,0 +1,45 @@
// DESCRIPTION: Verilator: Verilog Test module
//
// This file ONLY is placed into the Public Domain, for any use,
// without warranty, 2021 by Krzysztof Bieganski.
// SPDX-License-Identifier: CC0-1.0
`define checkd(gotv,expv) do if ((gotv) !== (expv)) begin $write("%%Error: %s:%0d: got=%0d exp=%0d\n", `__FILE__,`__LINE__, (gotv), (expv)); $stop; end while(0);
package config_pkg;
typedef struct packed {
int UPPER0;
int UPPER2;
int USE_QUAD0;
int USE_QUAD1;
int USE_QUAD2;
} config_struct;
endpackage : config_pkg
module t;
import config_pkg::*;
struct_submodule #(.MY_CONFIG('{
UPPER0: 10,
UPPER2: 20,
USE_QUAD0: 4,
USE_QUAD1: 5,
USE_QUAD2: 6
})) a_submodule_I ();
endmodule : t
module struct_submodule
import config_pkg::*;
#(parameter config_struct MY_CONFIG = '0);
initial begin
`checkd(MY_CONFIG.UPPER0, 10);
`checkd(MY_CONFIG.USE_QUAD0, 4);
`checkd(MY_CONFIG.USE_QUAD1, 5);
`checkd(MY_CONFIG.USE_QUAD2, 6);
`checkd(MY_CONFIG.UPPER2, 20);
$write("*-* All Finished *-*\n");
$finish;
end
endmodule : struct_submodule