diff --git a/Changes b/Changes
index 6cfd4b984..ba347daf3 100644
--- a/Changes
+++ b/Changes
@@ -18,6 +18,7 @@ Verilator 4.225 devel
 * Fix table misoptimizing away display (#3488). [Stefan Post]
 * Fix wrong bit op tree optimization (#3509). [Nathan Graybeal]
 * Fix incorrect tristate logic (#3399) [shareefj, Vighnesh Iyer]
+* Fix segfault exporting non-existant package (#3535).
 
 
 Verilator 4.224 2022-06-19
diff --git a/src/V3ParseSym.h b/src/V3ParseSym.h
index 998dac016..3a60bfbea 100644
--- a/src/V3ParseSym.h
+++ b/src/V3ParseSym.h
@@ -168,7 +168,7 @@ public:
                     "Export package not found");
         symCurrentp()->exportFromPackage(&m_syms, symp, id_or_star);
     }
-    void exportStarStar(AstNode* packagep) {
+    void exportStarStar() {
         // Export *::* from remote packages
         symCurrentp()->exportStarStar(&m_syms);
     }
diff --git a/src/verilog.y b/src/verilog.y
index 79daad950..75f377213 100644
--- a/src/verilog.y
+++ b/src/verilog.y
@@ -1171,7 +1171,7 @@ package_import_itemObj<strp>:   // IEEE: part of package_import_item
 
 package_export_declaration<nodep>: // IEEE: package_export_declaration
                 yEXPORT '*' yP_COLONCOLON '*' ';'
-                        { $$ = new AstPackageExportStarStar{$<fl>2}; SYMP->exportStarStar($<scp>1); }
+                        { $$ = new AstPackageExportStarStar{$<fl>2}; SYMP->exportStarStar(); }
         |       yEXPORT package_export_itemList ';'     { $$ = $2; }
         ;
 
@@ -1182,8 +1182,8 @@ package_export_itemList<nodep>:
 
 package_export_item<nodep>:     // ==IEEE: package_export_item
                 idCC yP_COLONCOLON package_import_itemObj
-                        { $$ = new AstPackageExport($<fl>3, VN_CAST($<scp>1, Package), *$3);
-                          SYMP->exportItem($<scp>1,*$3); }
+                        { $$ = new AstPackageExport{$<fl>3, VN_CAST($<scp>1, Package), *$3};
+                          if ($<scp>1) SYMP->exportItem($<scp>1, *$3); }
         ;
 
 //**********************************************************************
diff --git a/test_regress/t/t_package_alone_bad.out b/test_regress/t/t_package_alone_bad.out
new file mode 100644
index 000000000..6144b36ec
--- /dev/null
+++ b/test_regress/t/t_package_alone_bad.out
@@ -0,0 +1,5 @@
+%Error-PKGNODECL: t/t_package_alone_bad.v:7:8: Package/class 'pkg' not found, and needs to be predeclared (IEEE 1800-2017 26.3)
+    7 | export pkg::something;
+      |        ^~~
+                  ... For error description see https://verilator.org/warn/PKGNODECL?v=latest
+%Error: Exiting due to
diff --git a/test_regress/t/t_package_alone_bad.pl b/test_regress/t/t_package_alone_bad.pl
new file mode 100755
index 000000000..27159da5b
--- /dev/null
+++ b/test_regress/t/t_package_alone_bad.pl
@@ -0,0 +1,19 @@
+#!/usr/bin/env perl
+if (!$::Driver) { use FindBin; exec("$FindBin::Bin/bootstrap.pl", @ARGV, $0); die; }
+# DESCRIPTION: Verilator: Verilog Test driver/expect definition
+#
+# Copyright 2019 by Wilson Snyder. This program is free software; you
+# can redistribute it and/or modify it under the terms of either the GNU
+# Lesser General Public License Version 3 or the Perl Artistic License
+# Version 2.0.
+# SPDX-License-Identifier: LGPL-3.0-only OR Artistic-2.0
+
+scenarios(linter => 1);
+
+lint(
+    fails => 1,
+    expect_filename => $Self->{golden_filename},
+    );
+
+ok(1);
+1;
diff --git a/test_regress/t/t_package_alone_bad.v b/test_regress/t/t_package_alone_bad.v
new file mode 100644
index 000000000..34adc1b82
--- /dev/null
+++ b/test_regress/t/t_package_alone_bad.v
@@ -0,0 +1,7 @@
+// DESCRIPTION: Verilator: Verilog Test module
+//
+// This file ONLY is placed into the Public Domain, for any use,
+// without warranty, 2022 by Wilson Snyder.
+// SPDX-License-Identifier: CC0-1.0
+
+export pkg::something;