forked from github/verilator
Commentary: Spelling, and add upgrade notes (#3462)
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Wilson Snyder
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24
Changes
24
Changes
@ -14,14 +14,20 @@ Verilator 5.001 devel
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**Major:**
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* This is a major new release.
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* Fully support the Active and NBA scheduling regions as defined by the
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* Require C++20 for the new --timing features. Upgrading to a C++20 or
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newer compiler is strongly recommended.
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* Support the Active and NBA scheduling regions as defined by the
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SystemVerilog standard (IEEE 1800-2017 chapter 4). This means all generated
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clocks are now simulated correctly (#3278, #3384). [Geza Lore, Shunyao CAD]
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* Support timing controls (delays, event controls in any location, wait
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statements) and forks. See docs for details. [Krzysztof Bieganski, Antmicro Ltd]
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statements) and forks. [Krzysztof Bieganski, Antmicro Ltd]
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This may require adding --timing or --no-timing. See docs for details.
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* Introduce a new combinational logic optimizer (DFG), that can yield
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significant performance improvements on some designs. [Geza Lore, Shunyao CAD]
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* Add --binary option as alias of --main --exe --build --timing (#3625).
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For designs where C++ was only used to make a simple testbench we
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recommend abandoning that C++, and instead letting Verilator build it
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with --binary (or --main).
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**Minor:**
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@ -39,7 +45,7 @@ Verilator 4.228 2022-10-01
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**Announcement:**
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* The next release is anticipated primere Verilator Version 5. Please
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* The next release is anticipated to premiere Verilator Version 5. Please
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consider beta-testing the github 'develop-v5' branch, which will soon
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merge into the github 'master' branch (#3383).
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@ -50,12 +56,12 @@ Verilator 4.228 2022-10-01
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* Add --build-jobs, and rework arguments for -j (#3623). [Kamil Rakoczy]
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* Rename --bin to --build-dep-bin.
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* Rename debug flags --dumpi-tree, --dumpi-graph, etc. [Geza Lore]
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* Fix thread saftey in SystemC VL_ASSIGN_SBW/WSB (#3494) (#3513). [Mladen Slijepcevic]
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* Fix thread safety in SystemC VL_ASSIGN_SBW/WSB (#3494) (#3513). [Mladen Slijepcevic]
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* Fix crash in gate optimization of circular logic (#3543). [Bill Flynn]
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* Fix arguments in non-static method call (#3547) (#3582). [Gustav Svensk]
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* Fix default --mod-prefix when --prefix is repeated (#3603). [Geza Lore]
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* Fix calling trace() after open() segfault (#3610) (#3627). [Yu-Sheng Lin]
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* Fix typedef'ed class conversion to boolean (#3616). [Aleksander Kiryk]
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* Fix typedef'ed class conversion to Boolean (#3616). [Aleksander Kiryk]
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* Fix Verilation speed when disabled warnings (#3632). [Kamil Rakoczy, Antmicro Ltd]
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@ -79,17 +85,17 @@ Verilator 4.226 2022-08-31
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* Fix bisonpre for MSYS2 (#3471).
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* Fix max memory usage (#3483). [Kamil Rakoczy, Antmicro Ltd]
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* Fix empty string arguments to display (#3484). [Grulfen]
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* Fix table misoptimizing away display (#3488). [Stefan Post]
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* Fix table optimizing away display (#3488). [Stefan Post]
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* Fix unique_ptr memory header for MinGW64 (#3493).
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* Fix $dump systemtask with --output-split-cfuncs (#3495) (#3497). [Varun Koyyalagunta]
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* Fix $dump system task with --output-split-cfuncs (#3495) (#3497). [Varun Koyyalagunta]
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* Fix wrong bit op tree optimization (#3509). [Nathan Graybeal]
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* Fix nested default assignment for struct pattern (#3511) (#3524). [Mostafa Gamal]
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* Fix sformat string incorrectly cleared (#3515) (#3519). [Gustav Svensk]
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* Fix segfault exporting non-existant package (#3535).
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* Fix segfault exporting non-existent package (#3535).
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* Fix void-cast queue pop_front or pop_back (#3542) (#3364). [Drew Ranck]
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* Fix case statement comparing string literal (#3544). [Gustav Svensk]
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* Fix === with some tristate constants (#3551). [Ryszard Rozak, Antmicro Ltd]
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* Fix converting subclasses to string (#3552). [Arkadiusz Kozdra, Antmicro Ltd]
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* Fix converting classes to string (#3552). [Arkadiusz Kozdra, Antmicro Ltd]
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* Fix --hierarchical with order-based pin connections (#3583) (#3585). [Kelin9298]
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@ -447,7 +447,7 @@ wrapper which calls these two functions.
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the user should call:
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* :code:`designp->eventsPending()`, which returns :code:`true` if there are
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any delayed events penging,
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any delayed events pending,
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* :code:`designp->nextTimeSlot()`, which returns the simulation time of the
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next delayed event. This method can only be called if
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:code:`designp->nextTimeSlot()` returned :code:`true`.
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@ -522,7 +522,7 @@ Summary:
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.. option:: -fno-dfg-peephole-<pattern>
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Disable individula DFG peephole optimizer pattern.
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Disable individual DFG peephole optimizer pattern.
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.. option:: -fno-dfg-pre-inline
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@ -93,7 +93,7 @@ For --cc/--sc, it creates:
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* - *{prefix}{each_verilog_module}{__n}*\ .cpp
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- Additional lower C++ files
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* - *{prefix}{each_verilog_module}{__DepSet_hash__n}*\ .cpp
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- Additional lower C++ files (hased to reduce build times)
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- Additional lower C++ files (hashed to reduce build times)
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For --hierarchy mode, it creates:
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@ -327,7 +327,7 @@ List Of Warnings
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The warning could be disabled without affecting the simulation
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result. But it was recommended to check the warning as it may have
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degrated the performance of the Verilated model.
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degraded the performance of the Verilated model.
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.. option:: CMPCONST
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@ -7,12 +7,14 @@ Ami
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Amir
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Anastasiadis
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Anikin
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Antmicro
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Antonin
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Antwerpen
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Arasanipalai
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Arjen
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Asciidoc
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Ashutosh
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Ast
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Atmel
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Aurelien
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Bagri
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@ -108,8 +110,10 @@ Goessling
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Gonnen
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Goorah
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Gossner
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Graphviz
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Graybeal
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Grobman
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Grulfen
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Gunter
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Guo
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Hao
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@ -131,6 +135,7 @@ Iles
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Inlines
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Inout
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Iru
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Iyer
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Iztok
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Jacko
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Jae
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@ -157,6 +162,7 @@ Karge
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Karlsson
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Katz
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Katzman
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Kelin
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Keren
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Keyi
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Kimmitt
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@ -340,6 +346,7 @@ Verilating
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Verilation
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Verilator
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Verilog
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Vighnesh
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Viktor
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Vm
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Vukobratovic
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@ -376,6 +383,7 @@ agrobman
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ahouska
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al
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ala
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algrobman
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andit
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ar
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architected
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@ -397,6 +405,7 @@ bbox
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benchmarking
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biguint
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biops
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bisonpre
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bitOpTree
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bitOpTree
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bitop
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@ -441,6 +450,7 @@ const
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constexpr
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constpool
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coredump
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coroutine
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countbits
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countones
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cout
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@ -463,6 +473,7 @@ defenv
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defname
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defparam
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demangling
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dep
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der
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dereference
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desassign
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@ -480,6 +491,7 @@ dsvf
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dtor
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dumpall
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dumpfile
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dumpi
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dumplimit
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dumpoff
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dumpon
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@ -537,6 +549,7 @@ filesystem
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filt
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flto
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flushCall
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fno
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fopen
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forceable
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foreach
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@ -600,6 +613,7 @@ inouts
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inserted
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instantiation
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instantiations
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intra
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iostream
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ish
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isunbounded
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@ -725,6 +739,7 @@ profiler
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prototyptes
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ps
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pthread
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ptr
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pulldown
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pulldowns
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pullup
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@ -750,6 +765,7 @@ reloop
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resetall
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respecified
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rodata
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rolloverSize
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rr
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rst
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runtime
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@ -764,6 +780,7 @@ seg
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setuphold
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sformat
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sformatf
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shareefj
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shortint
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shortreal
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signame
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