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Fix replication of 64-bit signal change detects.

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Wilson Snyder 2018-09-28 08:36:37 -04:00
parent 1871e2b541
commit c9ee425ed5
2 changed files with 10 additions and 5 deletions
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3
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@ -12,6 +12,9 @@ The contributors that suggested a given feature are shown in []. Thanks!
*** Fix MinGW compile issues, msg2636. [HyungKi Jeong]
*** Fix replication of 64-bit signal change detects.
* Verilator 4.002 2018-09-16
** This is a major release. Any patches may require major rework to apply.

12
src/V3EmitC.cpp
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@ -849,6 +849,7 @@ class EmitCImp : EmitCStmts {
// METHODS
void doubleOrDetect(AstChangeDet* changep, bool& gotOne) {
static int s_addDoubleOr = 10; // Determined experimentally as best
if (!changep->rhsp()) {
if (!gotOne) gotOne = true;
else puts(" | ");
@ -857,17 +858,18 @@ class EmitCImp : EmitCStmts {
else {
AstNode* lhsp = changep->lhsp();
AstNode* rhsp = changep->rhsp();
static int addDoubleOr = 10; // Determined experimentally as best
if (!VN_IS(lhsp, VarRef) && !VN_IS(lhsp, ArraySel)) changep->v3fatalSrc("Not ref?");
if (!VN_IS(rhsp, VarRef) && !VN_IS(rhsp, ArraySel)) changep->v3fatalSrc("Not ref?");
for (int word=0; word<changep->lhsp()->widthWords(); word++) {
for (int word=0;
word < (changep->lhsp()->isWide() ? changep->lhsp()->widthWords() : 1);
++word) {
if (!gotOne) {
gotOne = true;
addDoubleOr = 10; // Determined experimentally as best
s_addDoubleOr = 10;
puts("(");
} else if (--addDoubleOr == 0) {
} else if (--s_addDoubleOr == 0) {
puts("|| (");
addDoubleOr = 10;
s_addDoubleOr = 10;
} else {
puts(" | (");
}