Mario1159/verilator
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Wilson Snyder 2009-01-26 18:36:59 -05:00
parent 2224918730
commit c2cf2bc0ba
1 changed files with 3 additions and 1 deletions
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@ -1304,6 +1304,7 @@ this to the signal causing a false loop may clear up the problem.
IE, with the following IE, with the following
reg splitme /* verilator isolate_assignments*/; reg splitme /* verilator isolate_assignments*/;
// Note the placement of the semicolon above
always @* begin always @* begin
if (....) begin if (....) begin
splitme = ....; splitme = ....;
@ -2363,7 +2364,8 @@ strips array bound checks where it believes them to be unnecessary.)
In the SYSTEMC example above, if you had in our.v: In the SYSTEMC example above, if you had in our.v:
input clk /*verilator public*/; input clk /*verilator public*/;
// Note the placement of the semicolon above
From the sc_main.cpp file, you'd then: From the sc_main.cpp file, you'd then: