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Internals: Fix off-by-one #line.

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Wilson Snyder 2021-07-10 07:11:34 -04:00
parent 825d6b87a8
commit bdceb08963
1 changed files with 1 additions and 4 deletions
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src/verilog.l
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@ -87,12 +87,9 @@ static double lexParseDouble(FileLine* fl, const char* textp, size_t length) {
ws [ \t\f\r]+
wsnr [ \t\f]+
crnl [\r]*[\n]
/* identifier */
id [a-zA-Z_][a-zA-Z0-9_$]*
/* escaped identifier */
escid \\[^ \t\f\r\n]+
word [a-zA-Z0-9_]+
/* verilog numbers, constructed to not match the ' that begins a '( or '{ */
vnum1 [0-9]*?[''][sS]?[bcodhBCODH][ \t\n]*[A-Fa-f0-9xXzZ_?]*
vnum2 [0-9]*?[''][sS]?[01xXzZ]
vnum3 [0-9][_0-9]*[ \t\n]*[''][sS]?[bcodhBCODH]?[ \t\n]*[A-Fa-f0-9xXzZ_?]+
@ -102,7 +99,7 @@ vnum {vnum1}|{vnum2}|{vnum3}|{vnum4}|{vnum5}
%%
<INITIAL>.|\n {BEGIN STATE_VERILOG_RECENT; yyless(0); }
<INITIAL>.|\n { BEGIN STATE_VERILOG_RECENT; yyless(0); }
/************************************************************************/
/* Verilator control files */