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Deprecate --cdc (#3279)

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Geza Lore 2022-01-16 15:30:44 +00:00 committed by GitHub
parent 5eded789aa
commit b4d8220cbb
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4 changed files with 13 additions and 2 deletions
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@ -16,6 +16,8 @@ Verilator 4.217 devel
* Primary inputs and outputs (VL_INW/VL_OUTW) now use VlWide type. * Primary inputs and outputs (VL_INW/VL_OUTW) now use VlWide type.
In general this should be backward compatible, but may lead to some In general this should be backward compatible, but may lead to some
wrapper code needing changes. wrapper code needing changes.
* Option --cdc is deprecated and is planned for removal,
file a bug if this is still being used.
**Minor:** **Minor:**

4
docs/guide/deprecations.rst
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@ -23,3 +23,7 @@ Configuration File -msg
XML locations XML locations
The XML "fl" attribute has been replaced with the "loc" attribute. "fl" The XML "fl" attribute has been replaced with the "loc" attribute. "fl"
is planned for removal no sooner than January 2021. is planned for removal no sooner than January 2021.
Option `--cdc`
The experimental `--cdc` option is believed to be generally unused and is
planned for removeal no sooner than January 2023.

4
src/V3Options.cpp
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@ -718,6 +718,10 @@ void V3Options::notify() {
"--xml-only or --E option"); "--xml-only or --E option");
} }
if (cdc()) {
cmdfl->v3warn(DEPRECATED, "Option --cdc is deprecated and is planned for removal");
}
if (m_build && (m_gmake || m_cmake)) { if (m_build && (m_gmake || m_cmake)) {
cmdfl->v3error("--make cannot be used together with --build. Suggest see manual"); cmdfl->v3error("--make cannot be used together with --build. Suggest see manual");
} }

5
test_regress/t/t_cdc_async_bad.out
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@ -1,8 +1,9 @@
%Warning-DEPRECATED: Option --cdc is deprecated and is planned for removal
... For warning description see https://verilator.org/warn/DEPRECATED?v=latest
... Use "/* verilator lint_off DEPRECATED */" and lint_on around source to disable this message.
%Warning-CDCRSTLOGIC: t/t_cdc_async_bad.v:28:21: Logic in path that feeds async reset, via signal: 't.rst2_bad_n' %Warning-CDCRSTLOGIC: t/t_cdc_async_bad.v:28:21: Logic in path that feeds async reset, via signal: 't.rst2_bad_n'
28 | wire rst2_bad_n = rst0_n | rst1_n; 28 | wire rst2_bad_n = rst0_n | rst1_n;
| ^ | ^
... For warning description see https://verilator.org/warn/CDCRSTLOGIC?v=latest
... Use "/* verilator lint_off CDCRSTLOGIC */" and lint_on around source to disable this message.
%Warning-CDCRSTLOGIC: See details in obj_vlt/t_cdc_async_bad/Vt_cdc_async_bad__cdc.txt %Warning-CDCRSTLOGIC: See details in obj_vlt/t_cdc_async_bad/Vt_cdc_async_bad__cdc.txt
%Warning-CDCRSTLOGIC: t/t_cdc_async_bad.v:53:21: Logic in path that feeds async reset, via signal: 't.rst6a_bad_n' %Warning-CDCRSTLOGIC: t/t_cdc_async_bad.v:53:21: Logic in path that feeds async reset, via signal: 't.rst6a_bad_n'
53 | wire rst6a_bad_n = rst6_bad_n ^ $c1("0"); 53 | wire rst6a_bad_n = rst6_bad_n ^ $c1("0");