forked from github/verilator
Fix missing edge type in xml output, msg2480.
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@ -12,6 +12,8 @@ The contributors that suggested a given feature are shown in []. Thanks!
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**** Fix input-only tristate comparisons, bug1267. [Alexis G]
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**** Fix missing edge type in xml output, msg2480. [Alexis G]
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**** Remove c++filt, bug1265. [Stefan Wallentowitz]
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@ -129,6 +129,11 @@ class EmitXmlFileVisitor : public AstNVisitor {
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// Children includes vpiHighConn and vpiLowConn; we don't support port bits (yet?)
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outputChildrenEnd(nodep, "port");
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}
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virtual void visit(AstSenItem* nodep) {
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outputTag(nodep, "");
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puts(" edgeType=\""+cvtToStr(nodep->edgeType().ascii())+"\""); // IEEE vpiTopModule
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outputChildrenEnd(nodep, "");
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}
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// Data types
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virtual void visit(AstBasicDType* nodep) {
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@ -43,7 +43,7 @@
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<var fl="e37" name="q" dtype_id="2"/>
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<always fl="e39">
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<sentree fl="e39">
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<senitem fl="e39">
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<senitem fl="e39" edgeType="POS">
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<varref fl="e39" name="clk" dtype_id="1"/>
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</senitem>
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</sentree>
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